Proposal submission deadline:
  20 November
   
   
   
   

   
 
If you don't find your question here, please send us an e-mail.
What is Innovate North-America?
How does Innovate North-America work?
What are the prizes to be won?
Who can participate in the contest?
Where can I learn about FPGA design?
What is the timeline for the contest?
What is expected in the project progress report?
Questions Is it necessary to use the FPGA for the proposed project?
Questions What are some of the design areas of most interest to industry?
Questions Can continuing Education students participate?
   
What is Innovate North-America?

Innovate North-America is an FPGA Programming Competition made possible thanks to the sponsorship of Altera and Impulse Accelerated Technologies and the leadership of the Ottawa section of the IEEE. With much effort, we held our first event in the Winter of 2008; and having learnt from that experience, we are now inviting North-American students to participate in an improved format.
The competition is open to undergraduate and graduate students enrolled in a Canadian or American college or university. It brings together students and mentors from academia or industry to create a learning environment encouraging innovation.

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How does Innovate North-America work?
Teams of students enrolled in North-American colleges or universities need to submit a project proposal to the organizing committee via e-mail with the following information: team member names and emails, team name, name of mentor and email, description of project proposal in AT LEAST 100 words and AT MOST 200 words.

Design projects will be judged on their innovation, quality of final report, completeness, practicality and complexity; the most important factor being innovation and quality of final report. Teams with masters students will have their score handicapped to make it fair for undergrad student. Points will be awarded to teams showing their designs running on the evaluation board provided.

All initial proposals will reviewed to select the semifinalists who will receive educational material, design software, and FPGA development boards. We will select finalists based on the innovation shown and the quality of the final report. Our judges panel will select a winner and runner ups from the finalists.
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What are the prizes to be won?
Cash prizes will be given, similar to how it was done for the 2008 event. In 2008 the total prize money was (CAN)$5000. All semifinalist teams received educational material, develoment software from Altera and lmpulse, and Altera Development kits. The winner and the top 5 runners up are (still) to be published in the IEEE Canadian Review.
Winners will have a poster at the FCCM conference (www.fccm.org). This is not a formal collaboration between FCCM and Altera, but an agreement to celebrate students that show innovation, initiative and perseverance in the field of FPGA design. FCCM is not sponsoring the Altera Innovate North America Design Competition in any way.
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Who can participate in the contest?
The programming competition is obviously open to students enrolled in Canadian or American colleges or universities in electrical/electronic/communication engineering, computer science or software engineering.
Teams are required to have a mentor
drop Mentor can be a professor from the institution where team is enrolled
drop Teams can alternatively have a mentor from industry
Teams will have a minimum of 2 and a maximum of 4 members
There is no limit on the number of teams from a given institution
drop There are no entry fees
drop There is no cost for the design kits given to semifinalists
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Where can I learn about FPGA design?
There are many FREE on-line resources. For example:
Altera Quartus II training
Various on-line training videos
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What is the timeline for the contest?
No later than Friday, 20 November 2009:
  Submit your teams proposal for entry into the contest
arrow Friday, 22 January 2010:
  Teams submit detailed progress report via e-mail
arrow Friday, 29 January 2010:
  Contest coordinators evaluate proposals and select entries
arrow No later than Friday, 29 January 2010:
 
Teams will be selected and notified via e-mail
Selected teams are required to have a mentor at this point to proceed
Design kits, will be sent to the selected teams
licenses for ImpulseC compiler available for teams that request it for their project
arrow Friday, 5 March 2010:
  Teams submit their final project report (Design Specification)
arrow No later than Friday, 12 March 2010:
  Finalists notified via Email
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What is expected in the progress report?
Project progress report on Friday, 22 January 2010:
 

The report should be clear and simple

Detailed description of the work done by the team on the project
It include the work distribution among the team members
It should also include design module details and source codes
Simulation reports are expected with the project design files
A project completion timeline should also be included.
   
  * Detailed explanations of protocols or exernal interfaces should not be inluded, unless absolutely necessary for the understanding of the design; if included, they should be very brief.
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 Is it necessary to use the FPGA for the proposed project?
Yes, this is an obligatory requirement to remain in the contest. The project must target teh Altera FPGA on the evaluation board to be provided.
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What are some of the design areas of most interest to industry?
a) high performance computing
b) image processing
c) computational finance
d) oil & gas
e) bioinformatics
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Can continuing Education students participate?
The spirit of this competition is to provide a venue for students new to industry to gain practical experience and exposure to industry, while they contribute their ideas towards pushing this technology forward. Continuing education students are welcome to participate within the constraints of this intent. Specifically, experienced engineers that have returned to school for continuing education are ineligible for prizes, but may receive tools and support and submit designs. Their working applications will be published.
 
 
 
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