-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--K1_oY_COORD[0] is touch_spi:u11|oY_COORD[0]
K1_oY_COORD[0] = DFFEAS(K1L133Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[1] is touch_spi:u11|oY_COORD[1]
K1_oY_COORD[1] = DFFEAS(K1L134Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[2] is touch_spi:u11|oY_COORD[2]
K1_oY_COORD[2] = DFFEAS(K1L135Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[3] is touch_spi:u11|oY_COORD[3]
K1_oY_COORD[3] = DFFEAS(K1L136Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--WB1L1 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~77
WB1L1 = K1_oY_COORD[2] & !K1_oY_COORD[1] & (K1_oY_COORD[0] $ !K1_oY_COORD[3]) # !K1_oY_COORD[2] & K1_oY_COORD[0] & (K1_oY_COORD[1] $ !K1_oY_COORD[3]);


--WB1L2 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~78
WB1L2 = K1_oY_COORD[1] & (K1_oY_COORD[0] & (K1_oY_COORD[3]) # !K1_oY_COORD[0] & K1_oY_COORD[2]) # !K1_oY_COORD[1] & K1_oY_COORD[2] & (K1_oY_COORD[0] $ K1_oY_COORD[3]);


--WB1L3 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~79
WB1L3 = K1_oY_COORD[2] & K1_oY_COORD[3] & (K1_oY_COORD[1] # !K1_oY_COORD[0]) # !K1_oY_COORD[2] & !K1_oY_COORD[0] & K1_oY_COORD[1] & !K1_oY_COORD[3];


--WB1L4 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~80
WB1L4 = K1_oY_COORD[0] & (K1_oY_COORD[1] $ !K1_oY_COORD[2]) # !K1_oY_COORD[0] & (K1_oY_COORD[1] & !K1_oY_COORD[2] & K1_oY_COORD[3] # !K1_oY_COORD[1] & K1_oY_COORD[2] & !K1_oY_COORD[3]);


--WB1L5 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~81
WB1L5 = K1_oY_COORD[1] & K1_oY_COORD[0] & (!K1_oY_COORD[3]) # !K1_oY_COORD[1] & (K1_oY_COORD[2] & (!K1_oY_COORD[3]) # !K1_oY_COORD[2] & K1_oY_COORD[0]);


--WB1L6 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~82
WB1L6 = K1_oY_COORD[0] & (K1_oY_COORD[3] $ (K1_oY_COORD[1] # !K1_oY_COORD[2])) # !K1_oY_COORD[0] & K1_oY_COORD[1] & !K1_oY_COORD[2] & !K1_oY_COORD[3];


--WB1L7 is SEG7_LUT_8:u6|SEG7_LUT:u0|reduce_or~83
WB1L7 = K1_oY_COORD[0] & (K1_oY_COORD[3] # K1_oY_COORD[1] $ K1_oY_COORD[2]) # !K1_oY_COORD[0] & (K1_oY_COORD[1] # K1_oY_COORD[2] $ K1_oY_COORD[3]);


--K1_oY_COORD[4] is touch_spi:u11|oY_COORD[4]
K1_oY_COORD[4] = DFFEAS(K1L137Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[5] is touch_spi:u11|oY_COORD[5]
K1_oY_COORD[5] = DFFEAS(K1L138Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[6] is touch_spi:u11|oY_COORD[6]
K1_oY_COORD[6] = DFFEAS(K1L139Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[7] is touch_spi:u11|oY_COORD[7]
K1_oY_COORD[7] = DFFEAS(K1L140Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--WB2L1 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~77
WB2L1 = K1_oY_COORD[6] & !K1_oY_COORD[5] & (K1_oY_COORD[4] $ !K1_oY_COORD[7]) # !K1_oY_COORD[6] & K1_oY_COORD[4] & (K1_oY_COORD[5] $ !K1_oY_COORD[7]);


--WB2L2 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~78
WB2L2 = K1_oY_COORD[5] & (K1_oY_COORD[4] & (K1_oY_COORD[7]) # !K1_oY_COORD[4] & K1_oY_COORD[6]) # !K1_oY_COORD[5] & K1_oY_COORD[6] & (K1_oY_COORD[4] $ K1_oY_COORD[7]);


--WB2L3 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~79
WB2L3 = K1_oY_COORD[6] & K1_oY_COORD[7] & (K1_oY_COORD[5] # !K1_oY_COORD[4]) # !K1_oY_COORD[6] & !K1_oY_COORD[4] & K1_oY_COORD[5] & !K1_oY_COORD[7];


--WB2L4 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~80
WB2L4 = K1_oY_COORD[4] & (K1_oY_COORD[5] $ !K1_oY_COORD[6]) # !K1_oY_COORD[4] & (K1_oY_COORD[5] & !K1_oY_COORD[6] & K1_oY_COORD[7] # !K1_oY_COORD[5] & K1_oY_COORD[6] & !K1_oY_COORD[7]);


--WB2L5 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~81
WB2L5 = K1_oY_COORD[5] & K1_oY_COORD[4] & (!K1_oY_COORD[7]) # !K1_oY_COORD[5] & (K1_oY_COORD[6] & (!K1_oY_COORD[7]) # !K1_oY_COORD[6] & K1_oY_COORD[4]);


--WB2L6 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~82
WB2L6 = K1_oY_COORD[4] & (K1_oY_COORD[7] $ (K1_oY_COORD[5] # !K1_oY_COORD[6])) # !K1_oY_COORD[4] & K1_oY_COORD[5] & !K1_oY_COORD[6] & !K1_oY_COORD[7];


--WB2L7 is SEG7_LUT_8:u6|SEG7_LUT:u1|reduce_or~83
WB2L7 = K1_oY_COORD[4] & (K1_oY_COORD[7] # K1_oY_COORD[5] $ K1_oY_COORD[6]) # !K1_oY_COORD[4] & (K1_oY_COORD[5] # K1_oY_COORD[6] $ K1_oY_COORD[7]);


--K1_oY_COORD[8] is touch_spi:u11|oY_COORD[8]
K1_oY_COORD[8] = DFFEAS(K1L141Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[9] is touch_spi:u11|oY_COORD[9]
K1_oY_COORD[9] = DFFEAS(K1L142Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[10] is touch_spi:u11|oY_COORD[10]
K1_oY_COORD[10] = DFFEAS(K1L143Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oY_COORD[11] is touch_spi:u11|oY_COORD[11]
K1_oY_COORD[11] = DFFEAS(K1L144Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--WB3L1 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~77
WB3L1 = K1_oY_COORD[10] & !K1_oY_COORD[9] & (K1_oY_COORD[8] $ !K1_oY_COORD[11]) # !K1_oY_COORD[10] & K1_oY_COORD[8] & (K1_oY_COORD[9] $ !K1_oY_COORD[11]);


--WB3L2 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~78
WB3L2 = K1_oY_COORD[9] & (K1_oY_COORD[8] & (K1_oY_COORD[11]) # !K1_oY_COORD[8] & K1_oY_COORD[10]) # !K1_oY_COORD[9] & K1_oY_COORD[10] & (K1_oY_COORD[8] $ K1_oY_COORD[11]);


--WB3L3 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~79
WB3L3 = K1_oY_COORD[10] & K1_oY_COORD[11] & (K1_oY_COORD[9] # !K1_oY_COORD[8]) # !K1_oY_COORD[10] & !K1_oY_COORD[8] & K1_oY_COORD[9] & !K1_oY_COORD[11];


--WB3L4 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~80
WB3L4 = K1_oY_COORD[8] & (K1_oY_COORD[9] $ !K1_oY_COORD[10]) # !K1_oY_COORD[8] & (K1_oY_COORD[9] & !K1_oY_COORD[10] & K1_oY_COORD[11] # !K1_oY_COORD[9] & K1_oY_COORD[10] & !K1_oY_COORD[11]);


--WB3L5 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~81
WB3L5 = K1_oY_COORD[9] & K1_oY_COORD[8] & (!K1_oY_COORD[11]) # !K1_oY_COORD[9] & (K1_oY_COORD[10] & (!K1_oY_COORD[11]) # !K1_oY_COORD[10] & K1_oY_COORD[8]);


--WB3L6 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~82
WB3L6 = K1_oY_COORD[8] & (K1_oY_COORD[11] $ (K1_oY_COORD[9] # !K1_oY_COORD[10])) # !K1_oY_COORD[8] & K1_oY_COORD[9] & !K1_oY_COORD[10] & !K1_oY_COORD[11];


--WB3L7 is SEG7_LUT_8:u6|SEG7_LUT:u2|reduce_or~83
WB3L7 = K1_oY_COORD[8] & (K1_oY_COORD[11] # K1_oY_COORD[9] $ K1_oY_COORD[10]) # !K1_oY_COORD[8] & (K1_oY_COORD[9] # K1_oY_COORD[10] $ K1_oY_COORD[11]);


--K1_oX_COORD[0] is touch_spi:u11|oX_COORD[0]
K1_oX_COORD[0] = DFFEAS(K1L120Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[1] is touch_spi:u11|oX_COORD[1]
K1_oX_COORD[1] = DFFEAS(K1L121Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[2] is touch_spi:u11|oX_COORD[2]
K1_oX_COORD[2] = DFFEAS(K1L122Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[3] is touch_spi:u11|oX_COORD[3]
K1_oX_COORD[3] = DFFEAS(K1L123Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--WB5L1 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~77
WB5L1 = K1_oX_COORD[2] & !K1_oX_COORD[1] & (K1_oX_COORD[0] $ !K1_oX_COORD[3]) # !K1_oX_COORD[2] & K1_oX_COORD[0] & (K1_oX_COORD[1] $ !K1_oX_COORD[3]);


--WB5L2 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~78
WB5L2 = K1_oX_COORD[1] & (K1_oX_COORD[0] & (K1_oX_COORD[3]) # !K1_oX_COORD[0] & K1_oX_COORD[2]) # !K1_oX_COORD[1] & K1_oX_COORD[2] & (K1_oX_COORD[0] $ K1_oX_COORD[3]);


--WB5L3 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~79
WB5L3 = K1_oX_COORD[2] & K1_oX_COORD[3] & (K1_oX_COORD[1] # !K1_oX_COORD[0]) # !K1_oX_COORD[2] & !K1_oX_COORD[0] & K1_oX_COORD[1] & !K1_oX_COORD[3];


--WB5L4 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~80
WB5L4 = K1_oX_COORD[0] & (K1_oX_COORD[1] $ !K1_oX_COORD[2]) # !K1_oX_COORD[0] & (K1_oX_COORD[1] & !K1_oX_COORD[2] & K1_oX_COORD[3] # !K1_oX_COORD[1] & K1_oX_COORD[2] & !K1_oX_COORD[3]);


--WB5L5 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~81
WB5L5 = K1_oX_COORD[1] & K1_oX_COORD[0] & (!K1_oX_COORD[3]) # !K1_oX_COORD[1] & (K1_oX_COORD[2] & (!K1_oX_COORD[3]) # !K1_oX_COORD[2] & K1_oX_COORD[0]);


--WB5L6 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~82
WB5L6 = K1_oX_COORD[0] & (K1_oX_COORD[3] $ (K1_oX_COORD[1] # !K1_oX_COORD[2])) # !K1_oX_COORD[0] & K1_oX_COORD[1] & !K1_oX_COORD[2] & !K1_oX_COORD[3];


--WB5L7 is SEG7_LUT_8:u6|SEG7_LUT:u4|reduce_or~83
WB5L7 = K1_oX_COORD[0] & (K1_oX_COORD[3] # K1_oX_COORD[1] $ K1_oX_COORD[2]) # !K1_oX_COORD[0] & (K1_oX_COORD[1] # K1_oX_COORD[2] $ K1_oX_COORD[3]);


--K1_oX_COORD[4] is touch_spi:u11|oX_COORD[4]
K1_oX_COORD[4] = DFFEAS(K1L124Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[5] is touch_spi:u11|oX_COORD[5]
K1_oX_COORD[5] = DFFEAS(K1L125Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[6] is touch_spi:u11|oX_COORD[6]
K1_oX_COORD[6] = DFFEAS(K1L126Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[7] is touch_spi:u11|oX_COORD[7]
K1_oX_COORD[7] = DFFEAS(K1L127Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--WB6L1 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~77
WB6L1 = K1_oX_COORD[6] & !K1_oX_COORD[5] & (K1_oX_COORD[4] $ !K1_oX_COORD[7]) # !K1_oX_COORD[6] & K1_oX_COORD[4] & (K1_oX_COORD[5] $ !K1_oX_COORD[7]);


--WB6L2 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~78
WB6L2 = K1_oX_COORD[5] & (K1_oX_COORD[4] & (K1_oX_COORD[7]) # !K1_oX_COORD[4] & K1_oX_COORD[6]) # !K1_oX_COORD[5] & K1_oX_COORD[6] & (K1_oX_COORD[4] $ K1_oX_COORD[7]);


--WB6L3 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~79
WB6L3 = K1_oX_COORD[6] & K1_oX_COORD[7] & (K1_oX_COORD[5] # !K1_oX_COORD[4]) # !K1_oX_COORD[6] & !K1_oX_COORD[4] & K1_oX_COORD[5] & !K1_oX_COORD[7];


--WB6L4 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~80
WB6L4 = K1_oX_COORD[4] & (K1_oX_COORD[5] $ !K1_oX_COORD[6]) # !K1_oX_COORD[4] & (K1_oX_COORD[5] & !K1_oX_COORD[6] & K1_oX_COORD[7] # !K1_oX_COORD[5] & K1_oX_COORD[6] & !K1_oX_COORD[7]);


--WB6L5 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~81
WB6L5 = K1_oX_COORD[5] & K1_oX_COORD[4] & (!K1_oX_COORD[7]) # !K1_oX_COORD[5] & (K1_oX_COORD[6] & (!K1_oX_COORD[7]) # !K1_oX_COORD[6] & K1_oX_COORD[4]);


--WB6L6 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~82
WB6L6 = K1_oX_COORD[4] & (K1_oX_COORD[7] $ (K1_oX_COORD[5] # !K1_oX_COORD[6])) # !K1_oX_COORD[4] & K1_oX_COORD[5] & !K1_oX_COORD[6] & !K1_oX_COORD[7];


--WB6L7 is SEG7_LUT_8:u6|SEG7_LUT:u5|reduce_or~83
WB6L7 = K1_oX_COORD[4] & (K1_oX_COORD[7] # K1_oX_COORD[5] $ K1_oX_COORD[6]) # !K1_oX_COORD[4] & (K1_oX_COORD[5] # K1_oX_COORD[6] $ K1_oX_COORD[7]);


--K1_oX_COORD[8] is touch_spi:u11|oX_COORD[8]
K1_oX_COORD[8] = DFFEAS(K1L128Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[9] is touch_spi:u11|oX_COORD[9]
K1_oX_COORD[9] = DFFEAS(K1L129Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[10] is touch_spi:u11|oX_COORD[10]
K1_oX_COORD[10] = DFFEAS(K1L130Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--K1_oX_COORD[11] is touch_spi:u11|oX_COORD[11]
K1_oX_COORD[11] = DFFEAS(K1L131Q, CLOCK_50, J1_oRST_0,  , K1L28,  ,  ,  ,  );


--WB7L1 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~77
WB7L1 = K1_oX_COORD[10] & !K1_oX_COORD[9] & (K1_oX_COORD[8] $ !K1_oX_COORD[11]) # !K1_oX_COORD[10] & K1_oX_COORD[8] & (K1_oX_COORD[9] $ !K1_oX_COORD[11]);


--WB7L2 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~78
WB7L2 = K1_oX_COORD[9] & (K1_oX_COORD[8] & (K1_oX_COORD[11]) # !K1_oX_COORD[8] & K1_oX_COORD[10]) # !K1_oX_COORD[9] & K1_oX_COORD[10] & (K1_oX_COORD[8] $ K1_oX_COORD[11]);


--WB7L3 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~79
WB7L3 = K1_oX_COORD[10] & K1_oX_COORD[11] & (K1_oX_COORD[9] # !K1_oX_COORD[8]) # !K1_oX_COORD[10] & !K1_oX_COORD[8] & K1_oX_COORD[9] & !K1_oX_COORD[11];


--WB7L4 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~80
WB7L4 = K1_oX_COORD[8] & (K1_oX_COORD[9] $ !K1_oX_COORD[10]) # !K1_oX_COORD[8] & (K1_oX_COORD[9] & !K1_oX_COORD[10] & K1_oX_COORD[11] # !K1_oX_COORD[9] & K1_oX_COORD[10] & !K1_oX_COORD[11]);


--WB7L5 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~81
WB7L5 = K1_oX_COORD[9] & K1_oX_COORD[8] & (!K1_oX_COORD[11]) # !K1_oX_COORD[9] & (K1_oX_COORD[10] & (!K1_oX_COORD[11]) # !K1_oX_COORD[10] & K1_oX_COORD[8]);


--WB7L6 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~82
WB7L6 = K1_oX_COORD[8] & (K1_oX_COORD[11] $ (K1_oX_COORD[9] # !K1_oX_COORD[10])) # !K1_oX_COORD[8] & K1_oX_COORD[9] & !K1_oX_COORD[10] & !K1_oX_COORD[11];


--WB7L7 is SEG7_LUT_8:u6|SEG7_LUT:u6|reduce_or~83
WB7L7 = K1_oX_COORD[8] & (K1_oX_COORD[11] # K1_oX_COORD[9] $ K1_oX_COORD[10]) # !K1_oX_COORD[8] & (K1_oX_COORD[9] # K1_oX_COORD[10] $ K1_oX_COORD[11]);


--UB1L48Q is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[0]~reg0
UB1L48Q = DFFEAS(UB1L46, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  , VCC,  ,  , !E1_mI2C_GO);


--UB1L54Q is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[2]~reg0
UB1L54Q = DFFEAS(UB1L52, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  , VCC,  ,  , !E1_mI2C_GO);


--UB1L57Q is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[3]~reg0
UB1L57Q = DFFEAS(UB1L55, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  , VCC,  ,  , !E1_mI2C_GO);


--UB1L51Q is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[1]~reg0
UB1L51Q = DFFEAS(UB1L49, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  , VCC,  ,  , !E1_mI2C_GO);


--UB1L15 is I2C_AV_Config:u2|I2C_Controller:u0|I2C_SCLK~253
UB1L15 = UB1L48Q # UB1L54Q # UB1L57Q # UB1L51Q;


--UB1L60Q is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[4]~reg0
UB1L60Q = DFFEAS(UB1L58, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  , VCC,  ,  , !E1_mI2C_GO);


--UB1L16 is I2C_AV_Config:u2|I2C_Controller:u0|I2C_SCLK~254
UB1L16 = UB1L60Q & (!UB1L57Q # !UB1L54Q) # !UB1L60Q & UB1L15;


--UB1L63Q is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[5]~reg0
UB1L63Q = DFFEAS(UB1L61, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  , VCC,  ,  , !E1_mI2C_GO);


--E1_mI2C_CTRL_CLK is I2C_AV_Config:u2|mI2C_CTRL_CLK
E1_mI2C_CTRL_CLK = DFFEAS(E1L100, CLOCK_50, J1_oRST_0,  ,  ,  ,  ,  ,  );


--UB1_SCLK is I2C_AV_Config:u2|I2C_Controller:u0|SCLK
UB1_SCLK = DFFEAS(UB1L23, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--UB1L17 is I2C_AV_Config:u2|I2C_Controller:u0|I2C_SCLK~255
UB1L17 = UB1L16 & UB1L63Q & !E1_mI2C_CTRL_CLK # !UB1_SCLK;


--A1L465 is altera_internal_jtag~TDO
A1L465 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L22);

--A1L466 is altera_internal_jtag~TMSUTAP
A1L466 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L22);

--A1L464 is altera_internal_jtag~TCKUTAP
A1L464 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L22);

--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , C1L22);


--K1L133Q is touch_spi:u11|my_coordinate[0]~reg0
K1L133Q = DFFEAS(K1L99Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--J1_oRST_0 is Reset_Delay:u9|oRST_0
J1_oRST_0 = DFFEAS(J1L77, CLOCK_50, KEY[0],  ,  ,  ,  ,  ,  );


--K1L191Q is touch_spi:u11|y_coordinate_config~reg0
K1L191Q = DFFEAS(K1L190, CLOCK_50, J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1_spi_ctrl_cnt[3] is touch_spi:u11|spi_ctrl_cnt[3]
K1_spi_ctrl_cnt[3] = DFFEAS(K1L19, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1_spi_ctrl_cnt[2] is touch_spi:u11|spi_ctrl_cnt[2]
K1_spi_ctrl_cnt[2] = DFFEAS(K1L17, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1_spi_ctrl_cnt[5] is touch_spi:u11|spi_ctrl_cnt[5]
K1_spi_ctrl_cnt[5] = DFFEAS(K1L23, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1_spi_ctrl_cnt[4] is touch_spi:u11|spi_ctrl_cnt[4]
K1_spi_ctrl_cnt[4] = DFFEAS(K1L21, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1L1 is touch_spi:u11|Equal~513
K1L1 = !K1_spi_ctrl_cnt[3] & !K1_spi_ctrl_cnt[2] & !K1_spi_ctrl_cnt[5] & !K1_spi_ctrl_cnt[4];


--K1_spi_ctrl_cnt[6] is touch_spi:u11|spi_ctrl_cnt[6]
K1_spi_ctrl_cnt[6] = DFFEAS(K1L185, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1_spi_ctrl_cnt[0] is touch_spi:u11|spi_ctrl_cnt[0]
K1_spi_ctrl_cnt[0] = DFFEAS(K1L13, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1_spi_ctrl_cnt[1] is touch_spi:u11|spi_ctrl_cnt[1]
K1_spi_ctrl_cnt[1] = DFFEAS(K1L186, CLOCK_50, J1_oRST_0,  , K1L7,  ,  ,  ,  );


--K1L2 is touch_spi:u11|Equal~514
K1L2 = K1L1 & K1_spi_ctrl_cnt[6] & K1_spi_ctrl_cnt[0] & !K1_spi_ctrl_cnt[1];


--K1L33Q is touch_spi:u11|dclk_cnt[0]~reg0
K1L33Q = DFFEAS(K1L31, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L36Q is touch_spi:u11|dclk_cnt[1]~reg0
K1L36Q = DFFEAS(K1L34, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L39Q is touch_spi:u11|dclk_cnt[2]~reg0
K1L39Q = DFFEAS(K1L37, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L42Q is touch_spi:u11|dclk_cnt[3]~reg0
K1L42Q = DFFEAS(K1L40, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L3 is touch_spi:u11|Equal~515
K1L3 = K1L33Q # K1L36Q # K1L39Q # !K1L42Q;


--K1L45Q is touch_spi:u11|dclk_cnt[4]~reg0
K1L45Q = DFFEAS(K1L43, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L51Q is touch_spi:u11|dclk_cnt[6]~reg0
K1L51Q = DFFEAS(K1L49, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L48Q is touch_spi:u11|dclk_cnt[5]~reg0
K1L48Q = DFFEAS(K1L46, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L54Q is touch_spi:u11|dclk_cnt[7]~reg0
K1L54Q = DFFEAS(K1L52, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L4 is touch_spi:u11|Equal~516
K1L4 = K1L45Q # K1L51Q # !K1L54Q # !K1L48Q;


--K1L60Q is touch_spi:u11|dclk_cnt[9]~reg0
K1L60Q = DFFEAS(K1L58, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L63Q is touch_spi:u11|dclk_cnt[10]~reg0
K1L63Q = DFFEAS(K1L61, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L66Q is touch_spi:u11|dclk_cnt[11]~reg0
K1L66Q = DFFEAS(K1L64, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L57Q is touch_spi:u11|dclk_cnt[8]~reg0
K1L57Q = DFFEAS(K1L55, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L5 is touch_spi:u11|Equal~517
K1L5 = K1L60Q # K1L63Q # K1L66Q # !K1L57Q;


--K1L70Q is touch_spi:u11|dclk_cnt[12]~reg0
K1L70Q = DFFEAS(K1L68, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L79Q is touch_spi:u11|dclk_cnt[15]~reg0
K1L79Q = DFFEAS(K1L77, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L73Q is touch_spi:u11|dclk_cnt[13]~reg0
K1L73Q = DFFEAS(K1L71, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L76Q is touch_spi:u11|dclk_cnt[14]~reg0
K1L76Q = DFFEAS(K1L74, CLOCK_50, J1_oRST_0,  ,  ,  ,  , K1L67,  );


--K1L6 is touch_spi:u11|Equal~518
K1L6 = K1L70Q # K1L79Q # !K1L76Q # !K1L73Q;


--K1L7 is touch_spi:u11|Equal~519
K1L7 = !K1L3 & !K1L4 & !K1L5 & !K1L6;


--K1L27 is touch_spi:u11|always2~12
K1L27 = K1L191Q & K1L2 & K1L7;


--K1L136Q is touch_spi:u11|my_coordinate[3]~reg0
K1L136Q = DFFEAS(K1L135Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L144Q is touch_spi:u11|my_coordinate[11]~reg0
K1L144Q = DFFEAS(K1L143Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L143Q is touch_spi:u11|my_coordinate[10]~reg0
K1L143Q = DFFEAS(K1L142Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L8 is touch_spi:u11|Equal~520
K1L8 = !K1L133Q & !K1L136Q & !K1L144Q & !K1L143Q;


--K1L142Q is touch_spi:u11|my_coordinate[9]~reg0
K1L142Q = DFFEAS(K1L141Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L141Q is touch_spi:u11|my_coordinate[8]~reg0
K1L141Q = DFFEAS(K1L140Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L140Q is touch_spi:u11|my_coordinate[7]~reg0
K1L140Q = DFFEAS(K1L139Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L139Q is touch_spi:u11|my_coordinate[6]~reg0
K1L139Q = DFFEAS(K1L138Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L9 is touch_spi:u11|Equal~521
K1L9 = !K1L142Q & !K1L141Q & !K1L140Q & !K1L139Q;


--K1L138Q is touch_spi:u11|my_coordinate[5]~reg0
K1L138Q = DFFEAS(K1L137Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L137Q is touch_spi:u11|my_coordinate[4]~reg0
K1L137Q = DFFEAS(K1L136Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L135Q is touch_spi:u11|my_coordinate[2]~reg0
K1L135Q = DFFEAS(K1L134Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L134Q is touch_spi:u11|my_coordinate[1]~reg0
K1L134Q = DFFEAS(K1L133Q, CLOCK_50, J1_oRST_0,  , K1L132,  ,  ,  ,  );


--K1L10 is touch_spi:u11|Equal~522
K1L10 = !K1L138Q & !K1L137Q & !K1L135Q & !K1L134Q;


--K1L28 is touch_spi:u11|always6~43
K1L28 = K1L27 & (!K1L10 # !K1L9 # !K1L8);


--K1L120Q is touch_spi:u11|mx_coordinate[0]~reg0
K1L120Q = DFFEAS(K1L99Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L121Q is touch_spi:u11|mx_coordinate[1]~reg0
K1L121Q = DFFEAS(K1L120Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L122Q is touch_spi:u11|mx_coordinate[2]~reg0
K1L122Q = DFFEAS(K1L121Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L123Q is touch_spi:u11|mx_coordinate[3]~reg0
K1L123Q = DFFEAS(K1L122Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L124Q is touch_spi:u11|mx_coordinate[4]~reg0
K1L124Q = DFFEAS(K1L123Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L125Q is touch_spi:u11|mx_coordinate[5]~reg0
K1L125Q = DFFEAS(K1L124Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L126Q is touch_spi:u11|mx_coordinate[6]~reg0
K1L126Q = DFFEAS(K1L125Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L127Q is touch_spi:u11|mx_coordinate[7]~reg0
K1L127Q = DFFEAS(K1L126Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L128Q is touch_spi:u11|mx_coordinate[8]~reg0
K1L128Q = DFFEAS(K1L127Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L129Q is touch_spi:u11|mx_coordinate[9]~reg0
K1L129Q = DFFEAS(K1L128Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L130Q is touch_spi:u11|mx_coordinate[10]~reg0
K1L130Q = DFFEAS(K1L129Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--K1L131Q is touch_spi:u11|mx_coordinate[11]~reg0
K1L131Q = DFFEAS(K1L130Q, CLOCK_50, J1_oRST_0,  , K1L116,  ,  ,  ,  );


--UB1L64 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1282
UB1L64 = !UB1L60Q & !UB1L54Q & !UB1L57Q & !UB1L51Q;


--UB1L18 is I2C_AV_Config:u2|I2C_Controller:u0|LessThan~163
UB1L18 = UB1L48Q # UB1L63Q # !UB1L64;


--UB1L46 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[0]~308
UB1L46 = UB1L18 & !UB1L48Q # !UB1L18 & UB1L48Q & VCC;

--UB1L47 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[0]~309
UB1L47 = CARRY(UB1L18 & !UB1L48Q);


--E1_mI2C_GO is I2C_AV_Config:u2|mI2C_GO
E1_mI2C_GO = DFFEAS(E1L47, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L44,  ,  ,  ,  );


--UB1L49 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[1]~310
UB1L49 = UB1L51Q & (GND # !UB1L47) # !UB1L51Q & (UB1L47 $ GND);

--UB1L50 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[1]~311
UB1L50 = CARRY(UB1L51Q # !UB1L47);


--UB1L52 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[2]~312
UB1L52 = UB1L54Q & UB1L50 & VCC # !UB1L54Q & !UB1L50;

--UB1L53 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[2]~313
UB1L53 = CARRY(!UB1L54Q & !UB1L50);


--UB1L55 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[3]~314
UB1L55 = UB1L57Q & (GND # !UB1L53) # !UB1L57Q & (UB1L53 $ GND);

--UB1L56 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[3]~315
UB1L56 = CARRY(UB1L57Q # !UB1L53);


--UB1L58 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[4]~316
UB1L58 = UB1L60Q & UB1L56 & VCC # !UB1L60Q & !UB1L56;

--UB1L59 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[4]~317
UB1L59 = CARRY(!UB1L60Q & !UB1L56);


--UB1L61 is I2C_AV_Config:u2|I2C_Controller:u0|SD_COUNTER[5]~318
UB1L61 = UB1L63Q $ UB1L59;


--E1_mI2C_CLK_DIV[12] is I2C_AV_Config:u2|mI2C_CLK_DIV[12]
E1_mI2C_CLK_DIV[12] = DFFEAS(E1L88, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[13] is I2C_AV_Config:u2|mI2C_CLK_DIV[13]
E1_mI2C_CLK_DIV[13] = DFFEAS(E1L91, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[14] is I2C_AV_Config:u2|mI2C_CLK_DIV[14]
E1_mI2C_CLK_DIV[14] = DFFEAS(E1L94, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[15] is I2C_AV_Config:u2|mI2C_CLK_DIV[15]
E1_mI2C_CLK_DIV[15] = DFFEAS(E1L97, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1L38 is I2C_AV_Config:u2|LessThan~391
E1L38 = !E1_mI2C_CLK_DIV[12] & !E1_mI2C_CLK_DIV[13] & !E1_mI2C_CLK_DIV[14] & !E1_mI2C_CLK_DIV[15];


--E1_mI2C_CLK_DIV[2] is I2C_AV_Config:u2|mI2C_CLK_DIV[2]
E1_mI2C_CLK_DIV[2] = DFFEAS(E1L58, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[3] is I2C_AV_Config:u2|mI2C_CLK_DIV[3]
E1_mI2C_CLK_DIV[3] = DFFEAS(E1L61, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[4] is I2C_AV_Config:u2|mI2C_CLK_DIV[4]
E1_mI2C_CLK_DIV[4] = DFFEAS(E1L64, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[5] is I2C_AV_Config:u2|mI2C_CLK_DIV[5]
E1_mI2C_CLK_DIV[5] = DFFEAS(E1L67, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1L39 is I2C_AV_Config:u2|LessThan~392
E1L39 = !E1_mI2C_CLK_DIV[2] & !E1_mI2C_CLK_DIV[3] & !E1_mI2C_CLK_DIV[4] & !E1_mI2C_CLK_DIV[5];


--E1_mI2C_CLK_DIV[6] is I2C_AV_Config:u2|mI2C_CLK_DIV[6]
E1_mI2C_CLK_DIV[6] = DFFEAS(E1L70, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[7] is I2C_AV_Config:u2|mI2C_CLK_DIV[7]
E1_mI2C_CLK_DIV[7] = DFFEAS(E1L73, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[8] is I2C_AV_Config:u2|mI2C_CLK_DIV[8]
E1_mI2C_CLK_DIV[8] = DFFEAS(E1L76, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1L40 is I2C_AV_Config:u2|LessThan~393
E1L40 = E1L39 # !E1_mI2C_CLK_DIV[8] # !E1_mI2C_CLK_DIV[7] # !E1_mI2C_CLK_DIV[6];


--E1_mI2C_CLK_DIV[9] is I2C_AV_Config:u2|mI2C_CLK_DIV[9]
E1_mI2C_CLK_DIV[9] = DFFEAS(E1L79, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[10] is I2C_AV_Config:u2|mI2C_CLK_DIV[10]
E1_mI2C_CLK_DIV[10] = DFFEAS(E1L82, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1L41 is I2C_AV_Config:u2|LessThan~394
E1L41 = !E1_mI2C_CLK_DIV[9] & !E1_mI2C_CLK_DIV[10];


--E1_mI2C_CLK_DIV[11] is I2C_AV_Config:u2|mI2C_CLK_DIV[11]
E1_mI2C_CLK_DIV[11] = DFFEAS(E1L85, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1L42 is I2C_AV_Config:u2|LessThan~395
E1L42 = E1_mI2C_CLK_DIV[11] & (!E1L41 # !E1L40) # !E1L38;


--E1L100 is I2C_AV_Config:u2|mI2C_CTRL_CLK~79
E1L100 = E1_mI2C_CTRL_CLK $ E1L42;


--UB1L20 is I2C_AV_Config:u2|I2C_Controller:u0|SCLK~145
UB1L20 = UB1L51Q & !UB1L57Q # !UB1L51Q & (UB1L54Q);


--UB1L21 is I2C_AV_Config:u2|I2C_Controller:u0|SCLK~146
UB1L21 = UB1L60Q & (!UB1L20 # !UB1L57Q # !UB1L48Q) # !UB1L60Q & (UB1L57Q # UB1L20);


--UB1L44 is I2C_AV_Config:u2|I2C_Controller:u0|SD[22]~695
UB1L44 = UB1L60Q & UB1L54Q & UB1L57Q & UB1L51Q;


--UB1L22 is I2C_AV_Config:u2|I2C_Controller:u0|SCLK~147
UB1L22 = UB1L48Q & (UB1L44 $ !UB1L21);


--UB1L23 is I2C_AV_Config:u2|I2C_Controller:u0|SCLK~148
UB1L23 = UB1L63Q & (UB1L21 & UB1_SCLK & !UB1L22 # !UB1L21 & (UB1L22)) # !UB1L63Q & UB1_SCLK;


--C1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
C1_hub_tdo = AMPP_FUNCTION(!A1L464, C1L21, !RB1_state[8]);


--K1L99Q is touch_spi:u11|madc_out~reg0
K1L99Q = DFFEAS(TCH_DOUT, CLOCK_50, J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1_mdclk is touch_spi:u11|mdclk
K1_mdclk = DFFEAS(K1L115, CLOCK_50, J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1_transmit_en is touch_spi:u11|transmit_en
K1_transmit_en = DFFEAS(K1L189, CLOCK_50, J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1L117 is touch_spi:u11|mx_coordinate[0]~699
K1L117 = !K1_spi_ctrl_cnt[6] & !K1_mdclk & K1_transmit_en;


--K1L118 is touch_spi:u11|mx_coordinate[0]~700
K1L118 = K1_spi_ctrl_cnt[2] # K1_spi_ctrl_cnt[1] & (K1_spi_ctrl_cnt[0] # !K1_spi_ctrl_cnt[4]);


--K1L119 is touch_spi:u11|mx_coordinate[0]~701
K1L119 = K1_spi_ctrl_cnt[5] & !K1_spi_ctrl_cnt[4] & (!K1L118 # !K1_spi_ctrl_cnt[3]) # !K1_spi_ctrl_cnt[5] & K1_spi_ctrl_cnt[4] & (K1_spi_ctrl_cnt[3] # K1L118);


--J1_Cont[0] is Reset_Delay:u9|Cont[0]
J1_Cont[0] = DFFEAS(J1L3, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[1] is Reset_Delay:u9|Cont[1]
J1_Cont[1] = DFFEAS(J1L6, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[2] is Reset_Delay:u9|Cont[2]
J1_Cont[2] = DFFEAS(J1L9, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[3] is Reset_Delay:u9|Cont[3]
J1_Cont[3] = DFFEAS(J1L12, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1L68 is Reset_Delay:u9|Equal~210
J1L68 = J1_Cont[0] & J1_Cont[1] & J1_Cont[2] & J1_Cont[3];


--J1_Cont[4] is Reset_Delay:u9|Cont[4]
J1_Cont[4] = DFFEAS(J1L15, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[5] is Reset_Delay:u9|Cont[5]
J1_Cont[5] = DFFEAS(J1L18, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[6] is Reset_Delay:u9|Cont[6]
J1_Cont[6] = DFFEAS(J1L21, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[7] is Reset_Delay:u9|Cont[7]
J1_Cont[7] = DFFEAS(J1L24, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1L69 is Reset_Delay:u9|Equal~211
J1L69 = J1_Cont[4] & J1_Cont[5] & J1_Cont[6] & J1_Cont[7];


--J1_Cont[8] is Reset_Delay:u9|Cont[8]
J1_Cont[8] = DFFEAS(J1L27, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[9] is Reset_Delay:u9|Cont[9]
J1_Cont[9] = DFFEAS(J1L30, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[10] is Reset_Delay:u9|Cont[10]
J1_Cont[10] = DFFEAS(J1L33, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[11] is Reset_Delay:u9|Cont[11]
J1_Cont[11] = DFFEAS(J1L36, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1L70 is Reset_Delay:u9|Equal~212
J1L70 = J1_Cont[8] & J1_Cont[9] & J1_Cont[10] & J1_Cont[11];


--J1_Cont[12] is Reset_Delay:u9|Cont[12]
J1_Cont[12] = DFFEAS(J1L39, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[13] is Reset_Delay:u9|Cont[13]
J1_Cont[13] = DFFEAS(J1L42, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[14] is Reset_Delay:u9|Cont[14]
J1_Cont[14] = DFFEAS(J1L45, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[15] is Reset_Delay:u9|Cont[15]
J1_Cont[15] = DFFEAS(J1L48, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1L71 is Reset_Delay:u9|Equal~213
J1L71 = J1_Cont[12] & J1_Cont[13] & J1_Cont[14] & J1_Cont[15];


--J1L72 is Reset_Delay:u9|Equal~214
J1L72 = J1L68 & J1L69 & J1L70 & J1L71;


--J1_Cont[20] is Reset_Delay:u9|Cont[20]
J1_Cont[20] = DFFEAS(J1L63, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[16] is Reset_Delay:u9|Cont[16]
J1_Cont[16] = DFFEAS(J1L51, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[17] is Reset_Delay:u9|Cont[17]
J1_Cont[17] = DFFEAS(J1L54, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[18] is Reset_Delay:u9|Cont[18]
J1_Cont[18] = DFFEAS(J1L57, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1_Cont[19] is Reset_Delay:u9|Cont[19]
J1_Cont[19] = DFFEAS(J1L60, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1L73 is Reset_Delay:u9|Equal~215
J1L73 = J1_Cont[16] & J1_Cont[17] & J1_Cont[18] & J1_Cont[19];


--J1L74 is Reset_Delay:u9|Equal~216
J1L74 = J1L72 & J1_Cont[20] & J1L73;


--J1_Cont[21] is Reset_Delay:u9|Cont[21]
J1_Cont[21] = DFFEAS(J1L66, CLOCK_50, KEY[0],  , J1L75,  ,  ,  ,  );


--J1L77 is Reset_Delay:u9|oRST_0~24
J1L77 = J1_oRST_0 # J1L74 # J1_Cont[21];


--K1L190 is touch_spi:u11|y_coordinate_config~16
K1L190 = K1L191Q $ (K1L7 & K1L2 & K1_transmit_en);


--K1L13 is touch_spi:u11|add~562
K1L13 = K1_spi_ctrl_cnt[0] $ VCC;

--K1L14 is touch_spi:u11|add~563
K1L14 = CARRY(K1_spi_ctrl_cnt[0]);


--K1L15 is touch_spi:u11|add~564
K1L15 = K1_spi_ctrl_cnt[1] & !K1L14 # !K1_spi_ctrl_cnt[1] & (K1L14 # GND);

--K1L16 is touch_spi:u11|add~565
K1L16 = CARRY(!K1L14 # !K1_spi_ctrl_cnt[1]);


--K1L17 is touch_spi:u11|add~566
K1L17 = K1_spi_ctrl_cnt[2] & (K1L16 $ GND) # !K1_spi_ctrl_cnt[2] & !K1L16 & VCC;

--K1L18 is touch_spi:u11|add~567
K1L18 = CARRY(K1_spi_ctrl_cnt[2] & !K1L16);


--K1L19 is touch_spi:u11|add~568
K1L19 = K1_spi_ctrl_cnt[3] & !K1L18 # !K1_spi_ctrl_cnt[3] & (K1L18 # GND);

--K1L20 is touch_spi:u11|add~569
K1L20 = CARRY(!K1L18 # !K1_spi_ctrl_cnt[3]);


--K1L21 is touch_spi:u11|add~570
K1L21 = K1_spi_ctrl_cnt[4] & (K1L20 $ GND) # !K1_spi_ctrl_cnt[4] & !K1L20 & VCC;

--K1L22 is touch_spi:u11|add~571
K1L22 = CARRY(K1_spi_ctrl_cnt[4] & !K1L20);


--K1L23 is touch_spi:u11|add~572
K1L23 = K1_spi_ctrl_cnt[5] & !K1L22 # !K1_spi_ctrl_cnt[5] & (K1L22 # GND);

--K1L24 is touch_spi:u11|add~573
K1L24 = CARRY(!K1L22 # !K1_spi_ctrl_cnt[5]);


--K1L25 is touch_spi:u11|add~574
K1L25 = K1_spi_ctrl_cnt[6] $ !K1L24;


--K1L11 is touch_spi:u11|Equal~523
K1L11 = K1_spi_ctrl_cnt[6] & K1_spi_ctrl_cnt[0];


--K1L185 is touch_spi:u11|spi_ctrl_cnt~614
K1L185 = K1L25 & (K1_spi_ctrl_cnt[1] # !K1L11 # !K1L1);


--K1L186 is touch_spi:u11|spi_ctrl_cnt~615
K1L186 = K1L15 & (K1_spi_ctrl_cnt[1] # !K1L11 # !K1L1);


--K1L31 is touch_spi:u11|dclk_cnt[0]~376
K1L31 = K1L33Q $ VCC;

--K1L32 is touch_spi:u11|dclk_cnt[0]~377
K1L32 = CARRY(K1L33Q);


--K1L67 is touch_spi:u11|dclk_cnt[12]~378
K1L67 = K1L7 # !K1_transmit_en;


--K1L34 is touch_spi:u11|dclk_cnt[1]~379
K1L34 = K1L36Q & !K1L32 # !K1L36Q & (K1L32 # GND);

--K1L35 is touch_spi:u11|dclk_cnt[1]~380
K1L35 = CARRY(!K1L32 # !K1L36Q);


--K1L37 is touch_spi:u11|dclk_cnt[2]~381
K1L37 = K1L39Q & (K1L35 $ GND) # !K1L39Q & !K1L35 & VCC;

--K1L38 is touch_spi:u11|dclk_cnt[2]~382
K1L38 = CARRY(K1L39Q & !K1L35);


--K1L40 is touch_spi:u11|dclk_cnt[3]~383
K1L40 = K1L42Q & !K1L38 # !K1L42Q & (K1L38 # GND);

--K1L41 is touch_spi:u11|dclk_cnt[3]~384
K1L41 = CARRY(!K1L38 # !K1L42Q);


--K1L43 is touch_spi:u11|dclk_cnt[4]~385
K1L43 = K1L45Q & (K1L41 $ GND) # !K1L45Q & !K1L41 & VCC;

--K1L44 is touch_spi:u11|dclk_cnt[4]~386
K1L44 = CARRY(K1L45Q & !K1L41);


--K1L46 is touch_spi:u11|dclk_cnt[5]~387
K1L46 = K1L48Q & !K1L44 # !K1L48Q & (K1L44 # GND);

--K1L47 is touch_spi:u11|dclk_cnt[5]~388
K1L47 = CARRY(!K1L44 # !K1L48Q);


--K1L49 is touch_spi:u11|dclk_cnt[6]~389
K1L49 = K1L51Q & (K1L47 $ GND) # !K1L51Q & !K1L47 & VCC;

--K1L50 is touch_spi:u11|dclk_cnt[6]~390
K1L50 = CARRY(K1L51Q & !K1L47);


--K1L52 is touch_spi:u11|dclk_cnt[7]~391
K1L52 = K1L54Q & !K1L50 # !K1L54Q & (K1L50 # GND);

--K1L53 is touch_spi:u11|dclk_cnt[7]~392
K1L53 = CARRY(!K1L50 # !K1L54Q);


--K1L55 is touch_spi:u11|dclk_cnt[8]~393
K1L55 = K1L57Q & (K1L53 $ GND) # !K1L57Q & !K1L53 & VCC;

--K1L56 is touch_spi:u11|dclk_cnt[8]~394
K1L56 = CARRY(K1L57Q & !K1L53);


--K1L58 is touch_spi:u11|dclk_cnt[9]~395
K1L58 = K1L60Q & !K1L56 # !K1L60Q & (K1L56 # GND);

--K1L59 is touch_spi:u11|dclk_cnt[9]~396
K1L59 = CARRY(!K1L56 # !K1L60Q);


--K1L61 is touch_spi:u11|dclk_cnt[10]~397
K1L61 = K1L63Q & (K1L59 $ GND) # !K1L63Q & !K1L59 & VCC;

--K1L62 is touch_spi:u11|dclk_cnt[10]~398
K1L62 = CARRY(K1L63Q & !K1L59);


--K1L64 is touch_spi:u11|dclk_cnt[11]~399
K1L64 = K1L66Q & !K1L62 # !K1L66Q & (K1L62 # GND);

--K1L65 is touch_spi:u11|dclk_cnt[11]~400
K1L65 = CARRY(!K1L62 # !K1L66Q);


--K1L68 is touch_spi:u11|dclk_cnt[12]~401
K1L68 = K1L70Q & (K1L65 $ GND) # !K1L70Q & !K1L65 & VCC;

--K1L69 is touch_spi:u11|dclk_cnt[12]~402
K1L69 = CARRY(K1L70Q & !K1L65);


--K1L71 is touch_spi:u11|dclk_cnt[13]~403
K1L71 = K1L73Q & !K1L69 # !K1L73Q & (K1L69 # GND);

--K1L72 is touch_spi:u11|dclk_cnt[13]~404
K1L72 = CARRY(!K1L69 # !K1L73Q);


--K1L74 is touch_spi:u11|dclk_cnt[14]~405
K1L74 = K1L76Q & (K1L72 $ GND) # !K1L76Q & !K1L72 & VCC;

--K1L75 is touch_spi:u11|dclk_cnt[14]~406
K1L75 = CARRY(K1L76Q & !K1L72);


--K1L77 is touch_spi:u11|dclk_cnt[15]~407
K1L77 = K1L79Q $ K1L75;


--UB1_END is I2C_AV_Config:u2|I2C_Controller:u0|END
UB1_END = DFFEAS(UB1L14, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--E1_mSetup_ST.0010 is I2C_AV_Config:u2|mSetup_ST.0010
E1_mSetup_ST.0010 = DFFEAS(E1L125, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L44,  ,  ,  ,  );


--E1_mSetup_ST.0001 is I2C_AV_Config:u2|mSetup_ST.0001
E1_mSetup_ST.0001 = DFFEAS(E1L48, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L44,  ,  ,  ,  );


--E1L47 is I2C_AV_Config:u2|Select~135
E1L47 = E1_mI2C_GO & (UB1_END # !E1_mSetup_ST.0001) # !E1_mI2C_GO & (!E1_mSetup_ST.0010 & !E1_mSetup_ST.0001);


--E1_LUT_INDEX[0] is I2C_AV_Config:u2|LUT_INDEX[0]
E1_LUT_INDEX[0] = DFFEAS(E1L20, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L35,  ,  ,  ,  );


--E1_LUT_INDEX[1] is I2C_AV_Config:u2|LUT_INDEX[1]
E1_LUT_INDEX[1] = DFFEAS(E1L23, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L35,  ,  ,  ,  );


--E1L43 is I2C_AV_Config:u2|LessThan~396
E1L43 = !E1_LUT_INDEX[1] # !E1_LUT_INDEX[0];


--E1_LUT_INDEX[3] is I2C_AV_Config:u2|LUT_INDEX[3]
E1_LUT_INDEX[3] = DFFEAS(E1L29, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L35,  ,  ,  ,  );


--E1_LUT_INDEX[2] is I2C_AV_Config:u2|LUT_INDEX[2]
E1_LUT_INDEX[2] = DFFEAS(E1L26, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L35,  ,  ,  ,  );


--E1L126 is I2C_AV_Config:u2|reduce_or~1832
E1L126 = !E1_LUT_INDEX[3] & !E1_LUT_INDEX[2];


--E1_LUT_INDEX[4] is I2C_AV_Config:u2|LUT_INDEX[4]
E1_LUT_INDEX[4] = DFFEAS(E1L32, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L35,  ,  ,  ,  );


--E1_LUT_INDEX[5] is I2C_AV_Config:u2|LUT_INDEX[5]
E1_LUT_INDEX[5] = DFFEAS(E1L36, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L35,  ,  ,  ,  );


--E1L44 is I2C_AV_Config:u2|LessThan~397
E1L44 = E1L43 & E1L126 # !E1_LUT_INDEX[5] # !E1_LUT_INDEX[4];


--E1_mI2C_CLK_DIV[1] is I2C_AV_Config:u2|mI2C_CLK_DIV[1]
E1_mI2C_CLK_DIV[1] = DFFEAS(E1L55, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1_mI2C_CLK_DIV[0] is I2C_AV_Config:u2|mI2C_CLK_DIV[0]
E1_mI2C_CLK_DIV[0] = DFFEAS(E1L52, CLOCK_50, J1_oRST_0,  ,  ,  ,  , E1L42,  );


--E1L52 is I2C_AV_Config:u2|mI2C_CLK_DIV[0]~239
E1L52 = E1_mI2C_CLK_DIV[0] $ VCC;

--E1L53 is I2C_AV_Config:u2|mI2C_CLK_DIV[0]~240
E1L53 = CARRY(E1_mI2C_CLK_DIV[0]);


--E1L55 is I2C_AV_Config:u2|mI2C_CLK_DIV[1]~241
E1L55 = E1_mI2C_CLK_DIV[1] & !E1L53 # !E1_mI2C_CLK_DIV[1] & (E1L53 # GND);

--E1L56 is I2C_AV_Config:u2|mI2C_CLK_DIV[1]~242
E1L56 = CARRY(!E1L53 # !E1_mI2C_CLK_DIV[1]);


--E1L58 is I2C_AV_Config:u2|mI2C_CLK_DIV[2]~243
E1L58 = E1_mI2C_CLK_DIV[2] & (E1L56 $ GND) # !E1_mI2C_CLK_DIV[2] & !E1L56 & VCC;

--E1L59 is I2C_AV_Config:u2|mI2C_CLK_DIV[2]~244
E1L59 = CARRY(E1_mI2C_CLK_DIV[2] & !E1L56);


--E1L61 is I2C_AV_Config:u2|mI2C_CLK_DIV[3]~245
E1L61 = E1_mI2C_CLK_DIV[3] & !E1L59 # !E1_mI2C_CLK_DIV[3] & (E1L59 # GND);

--E1L62 is I2C_AV_Config:u2|mI2C_CLK_DIV[3]~246
E1L62 = CARRY(!E1L59 # !E1_mI2C_CLK_DIV[3]);


--E1L64 is I2C_AV_Config:u2|mI2C_CLK_DIV[4]~247
E1L64 = E1_mI2C_CLK_DIV[4] & (E1L62 $ GND) # !E1_mI2C_CLK_DIV[4] & !E1L62 & VCC;

--E1L65 is I2C_AV_Config:u2|mI2C_CLK_DIV[4]~248
E1L65 = CARRY(E1_mI2C_CLK_DIV[4] & !E1L62);


--E1L67 is I2C_AV_Config:u2|mI2C_CLK_DIV[5]~249
E1L67 = E1_mI2C_CLK_DIV[5] & !E1L65 # !E1_mI2C_CLK_DIV[5] & (E1L65 # GND);

--E1L68 is I2C_AV_Config:u2|mI2C_CLK_DIV[5]~250
E1L68 = CARRY(!E1L65 # !E1_mI2C_CLK_DIV[5]);


--E1L70 is I2C_AV_Config:u2|mI2C_CLK_DIV[6]~251
E1L70 = E1_mI2C_CLK_DIV[6] & (E1L68 $ GND) # !E1_mI2C_CLK_DIV[6] & !E1L68 & VCC;

--E1L71 is I2C_AV_Config:u2|mI2C_CLK_DIV[6]~252
E1L71 = CARRY(E1_mI2C_CLK_DIV[6] & !E1L68);


--E1L73 is I2C_AV_Config:u2|mI2C_CLK_DIV[7]~253
E1L73 = E1_mI2C_CLK_DIV[7] & !E1L71 # !E1_mI2C_CLK_DIV[7] & (E1L71 # GND);

--E1L74 is I2C_AV_Config:u2|mI2C_CLK_DIV[7]~254
E1L74 = CARRY(!E1L71 # !E1_mI2C_CLK_DIV[7]);


--E1L76 is I2C_AV_Config:u2|mI2C_CLK_DIV[8]~255
E1L76 = E1_mI2C_CLK_DIV[8] & (E1L74 $ GND) # !E1_mI2C_CLK_DIV[8] & !E1L74 & VCC;

--E1L77 is I2C_AV_Config:u2|mI2C_CLK_DIV[8]~256
E1L77 = CARRY(E1_mI2C_CLK_DIV[8] & !E1L74);


--E1L79 is I2C_AV_Config:u2|mI2C_CLK_DIV[9]~257
E1L79 = E1_mI2C_CLK_DIV[9] & !E1L77 # !E1_mI2C_CLK_DIV[9] & (E1L77 # GND);

--E1L80 is I2C_AV_Config:u2|mI2C_CLK_DIV[9]~258
E1L80 = CARRY(!E1L77 # !E1_mI2C_CLK_DIV[9]);


--E1L82 is I2C_AV_Config:u2|mI2C_CLK_DIV[10]~259
E1L82 = E1_mI2C_CLK_DIV[10] & (E1L80 $ GND) # !E1_mI2C_CLK_DIV[10] & !E1L80 & VCC;

--E1L83 is I2C_AV_Config:u2|mI2C_CLK_DIV[10]~260
E1L83 = CARRY(E1_mI2C_CLK_DIV[10] & !E1L80);


--E1L85 is I2C_AV_Config:u2|mI2C_CLK_DIV[11]~261
E1L85 = E1_mI2C_CLK_DIV[11] & !E1L83 # !E1_mI2C_CLK_DIV[11] & (E1L83 # GND);

--E1L86 is I2C_AV_Config:u2|mI2C_CLK_DIV[11]~262
E1L86 = CARRY(!E1L83 # !E1_mI2C_CLK_DIV[11]);


--E1L88 is I2C_AV_Config:u2|mI2C_CLK_DIV[12]~263
E1L88 = E1_mI2C_CLK_DIV[12] & (E1L86 $ GND) # !E1_mI2C_CLK_DIV[12] & !E1L86 & VCC;

--E1L89 is I2C_AV_Config:u2|mI2C_CLK_DIV[12]~264
E1L89 = CARRY(E1_mI2C_CLK_DIV[12] & !E1L86);


--E1L91 is I2C_AV_Config:u2|mI2C_CLK_DIV[13]~265
E1L91 = E1_mI2C_CLK_DIV[13] & !E1L89 # !E1_mI2C_CLK_DIV[13] & (E1L89 # GND);

--E1L92 is I2C_AV_Config:u2|mI2C_CLK_DIV[13]~266
E1L92 = CARRY(!E1L89 # !E1_mI2C_CLK_DIV[13]);


--E1L94 is I2C_AV_Config:u2|mI2C_CLK_DIV[14]~267
E1L94 = E1_mI2C_CLK_DIV[14] & (E1L92 $ GND) # !E1_mI2C_CLK_DIV[14] & !E1L92 & VCC;

--E1L95 is I2C_AV_Config:u2|mI2C_CLK_DIV[14]~268
E1L95 = CARRY(E1_mI2C_CLK_DIV[14] & !E1L92);


--E1L97 is I2C_AV_Config:u2|mI2C_CLK_DIV[15]~269
E1L97 = E1_mI2C_CLK_DIV[15] $ E1L95;


--PB3_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
PB3_Q[0] = AMPP_FUNCTION(A1L464, C1L32, C1_CLRN_SIGNAL, PB3L5);


--PB6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
PB6_Q[0] = AMPP_FUNCTION(A1L464, altera_internal_jtag, C1_CLRN_SIGNAL, C1L28);


--B1_bypass_reg_out is sld_signaltap:auto_signaltap_0|bypass_reg_out
B1_bypass_reg_out = AMPP_FUNCTION(A1L464, B1L77, !B1_reset_all);


--PB4_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5]
PB4_Q[5] = AMPP_FUNCTION(A1L464, C1L27, C1_CLRN_SIGNAL, C1L31);


--PB4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
PB4_Q[3] = AMPP_FUNCTION(A1L464, C1L25, C1_CLRN_SIGNAL, C1L31);


--PB4_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[4]
PB4_Q[4] = AMPP_FUNCTION(A1L464, C1L26, C1_CLRN_SIGNAL, C1L31);


--C1L15 is sld_hub:sld_hub_inst|hub_tdo~759
C1L15 = AMPP_FUNCTION(B1_bypass_reg_out, PB4_Q[5], PB4_Q[3], PB4_Q[4]);


--S1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
S1_dffs[0] = AMPP_FUNCTION(A1L464, S1_dffs[1], !B1_reset_all, P1_trigger_setup_ena);


--N1_WORD_SR[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]
N1_WORD_SR[0] = AMPP_FUNCTION(A1L464, N1L21, N1L16);


--C1L16 is sld_hub:sld_hub_inst|hub_tdo~760
C1L16 = AMPP_FUNCTION(PB4_Q[5], PB4_Q[3], S1_dffs[0], N1_WORD_SR[0]);


--S4_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
S4_dffs[0] = AMPP_FUNCTION(A1L464, S4L1, !B1_reset_all);


--C1L17 is sld_hub:sld_hub_inst|hub_tdo~761
C1L17 = AMPP_FUNCTION(PB4_Q[4], S4_dffs[0]);


--C1L18 is sld_hub:sld_hub_inst|hub_tdo~762
C1L18 = AMPP_FUNCTION(PB6_Q[0], C1L15, C1L16, C1L17);


--PB7_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]
PB7_Q[0] = AMPP_FUNCTION(A1L464, PB7L3, C1L28);


--N2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
N2_WORD_SR[0] = AMPP_FUNCTION(A1L464, N2L29, N2L23);


--C1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
C1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L464, C1L13);


--SB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[0]
SB1_dffe1a[0] = AMPP_FUNCTION(A1L464, SB1_w_anode1w[3], C1_CLRN_SIGNAL, C1L6);


--C1L19 is sld_hub:sld_hub_inst|hub_tdo~763
C1L19 = AMPP_FUNCTION(PB7_Q[0], N2_WORD_SR[0], C1_HUB_BYPASS_REG, SB1_dffe1a[0]);


--C1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
C1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L464, C1L9, RB1_state[0], RB1_state[12]);


--C1L20 is sld_hub:sld_hub_inst|hub_tdo~764
C1L20 = AMPP_FUNCTION(PB3_Q[0], C1L18, C1L19, C1_jtag_debug_mode_usr1);


--RB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]
RB1_state[3] = AMPP_FUNCTION(A1L464, RB1L19);


--RB1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]
RB1_state[4] = AMPP_FUNCTION(A1L464, RB1L20, A1L466);


--RB1L21 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13
RB1L21 = AMPP_FUNCTION(RB1_state[3], RB1_state[4]);


--RB1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]
RB1_state[8] = AMPP_FUNCTION(A1L464, RB1L25, !A1L466);


--UB1L25Q is I2C_AV_Config:u2|I2C_Controller:u0|SDO~reg0
UB1L25Q = DFFEAS(UB1L84, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1_oADC_DIN is touch_spi:u11|oADC_DIN
K1_oADC_DIN = DFFEAS(K1L108, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--TB1_mI2S_CLK is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK
TB1_mI2S_CLK = DFFEAS(TB1L74, div[2], J1_oRST_0,  ,  ,  ,  ,  ,  );


--TB1_mSCLK is I2S_LCM_Config:u1|I2S_Controller:u0|mSCLK
TB1_mSCLK = DFFEAS(TB1L76, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--D1_I2S_BUSY_n is I2S_LCM_Config:u1|I2S_BUSY_n
D1_I2S_BUSY_n = DFFEAS(D1L2, TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--A1L1 is ADC_DCLK~27
A1L1 = D1_I2S_BUSY_n & K1_mdclk # !D1_I2S_BUSY_n & (TB1_mI2S_CLK & TB1_mSCLK);


--H1L50Q is Touch_Panel_Tining:u7|Y_cnt[9]~reg0
H1L50Q = DFFEAS(H1L51, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L46Q is Touch_Panel_Tining:u7|Y_cnt[5]~reg0
H1L46Q = DFFEAS(H1L65, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L45Q is Touch_Panel_Tining:u7|Y_cnt[4]~reg0
H1L45Q = DFFEAS(H1L63, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L42Q is Touch_Panel_Tining:u7|Y_cnt[1]~reg0
H1L42Q = DFFEAS(H1L57, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L41Q is Touch_Panel_Tining:u7|Y_cnt[0]~reg0
H1L41Q = DFFEAS(H1L52, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L44Q is Touch_Panel_Tining:u7|Y_cnt[3]~reg0
H1L44Q = DFFEAS(H1L53, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L43Q is Touch_Panel_Tining:u7|Y_cnt[2]~reg0
H1L43Q = DFFEAS(H1L54, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L20 is Touch_Panel_Tining:u7|LessThan~667
H1L20 = !H1L44Q & !H1L43Q;


--H1L21 is Touch_Panel_Tining:u7|LessThan~668
H1L21 = H1L45Q # H1L42Q & H1L41Q # !H1L20;


--H1L49Q is Touch_Panel_Tining:u7|Y_cnt[8]~reg0
H1L49Q = DFFEAS(H1L71, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L48Q is Touch_Panel_Tining:u7|Y_cnt[7]~reg0
H1L48Q = DFFEAS(H1L69, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L47Q is Touch_Panel_Tining:u7|Y_cnt[6]~reg0
H1L47Q = DFFEAS(H1L67, !CLOCK_27, J1_oRST_2,  , H1L16,  ,  ,  ,  );


--H1L22 is Touch_Panel_Tining:u7|LessThan~669
H1L22 = !H1L49Q & !H1L48Q & !H1L47Q;


--H1L23 is Touch_Panel_Tining:u7|LessThan~670
H1L23 = H1L50Q # H1L46Q & H1L21 # !H1L22;


--H1L33Q is Touch_Panel_Tining:u7|X_cnt[5]~reg0
H1L33Q = DFFEAS(H1L39, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L32Q is Touch_Panel_Tining:u7|X_cnt[4]~reg0
H1L32Q = DFFEAS(H1L83, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L31Q is Touch_Panel_Tining:u7|X_cnt[3]~reg0
H1L31Q = DFFEAS(H1L81, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L9 is Touch_Panel_Tining:u7|Equal~319
H1L9 = H1L32Q & H1L31Q;


--H1L30Q is Touch_Panel_Tining:u7|X_cnt[2]~reg0
H1L30Q = DFFEAS(H1L79, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L29Q is Touch_Panel_Tining:u7|X_cnt[1]~reg0
H1L29Q = DFFEAS(H1L77, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L24 is Touch_Panel_Tining:u7|LessThan~671
H1L24 = H1L33Q # H1L9 & (H1L30Q # H1L29Q);


--H1L35Q is Touch_Panel_Tining:u7|X_cnt[7]~reg0
H1L35Q = DFFEAS(H1L89, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L34Q is Touch_Panel_Tining:u7|X_cnt[6]~reg0
H1L34Q = DFFEAS(H1L87, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L25 is Touch_Panel_Tining:u7|LessThan~672
H1L25 = H1L35Q & H1L34Q;


--H1L37Q is Touch_Panel_Tining:u7|X_cnt[9]~reg0
H1L37Q = DFFEAS(H1L93, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L36Q is Touch_Panel_Tining:u7|X_cnt[8]~reg0
H1L36Q = DFFEAS(H1L91, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L10 is Touch_Panel_Tining:u7|Equal~320
H1L10 = !H1L37Q & !H1L36Q;


--H1L6 is Touch_Panel_Tining:u7|Display_area~49
H1L6 = H1L23 & (H1L24 & H1L25 # !H1L10);


--H1L2 is Touch_Panel_Tining:u7|DENB~271
H1L2 = H1L35Q & H1L34Q & H1L37Q;


--H1L26 is Touch_Panel_Tining:u7|LessThan~673
H1L26 = !H1L2 # !H1L36Q # !H1L32Q # !H1L33Q;


--H1L28Q is Touch_Panel_Tining:u7|X_cnt[0]~reg0
H1L28Q = DFFEAS(H1L75, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L11 is Touch_Panel_Tining:u7|Equal~321
H1L11 = H1L30Q & H1L29Q & H1L28Q;


--H1L38Q is Touch_Panel_Tining:u7|X_cnt[10]~reg0
H1L38Q = DFFEAS(H1L40, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1L7 is Touch_Panel_Tining:u7|Display_area~50
H1L7 = !H1L38Q & (H1L26 # !H1L31Q & !H1L11);


--H1L12 is Touch_Panel_Tining:u7|Equal~322
H1L12 = H1L22 & !H1L46Q & !H1L45Q & !H1L42Q;


--H1L8 is Touch_Panel_Tining:u7|Display_area~51
H1L8 = H1L6 & H1L7 & (H1L18 # !H1L50Q);


--H1_DENB is Touch_Panel_Tining:u7|DENB
H1_DENB = DFFEAS(H1L5, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1_Hsyn is Touch_Panel_Tining:u7|Hsyn
H1_Hsyn = DFFEAS(H1L16, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--H1_Vsyn is Touch_Panel_Tining:u7|Vsyn
H1_Vsyn = DFFEAS(H1L17, !CLOCK_27, J1_oRST_2,  ,  ,  ,  ,  ,  );


--TB1_mSDATA is I2S_LCM_Config:u1|I2S_Controller:u0|mSDATA
TB1_mSDATA = DFFEAS(TB1L19, !TB1_mI2S_CLK, J1_oRST_0,  , TB1L21,  ,  ,  ,  );


--TB1L20Q is I2S_LCM_Config:u1|I2S_Controller:u0|always1~1
TB1L20Q = DFFEAS(D1_mI2S_STR, !TB1_mI2S_CLK, J1_oRST_0,  , TB1L21,  ,  ,  ,  );


--TB1_mST[1] is I2S_LCM_Config:u1|I2S_Controller:u0|mST[1]
TB1_mST[1] = DFFEAS(TB1L84, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  , !D1_mI2S_STR,  );


--TB1_mST[2] is I2S_LCM_Config:u1|I2S_Controller:u0|mST[2]
TB1_mST[2] = DFFEAS(TB1L87, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  , !D1_mI2S_STR,  );


--TB1L1 is I2S_LCM_Config:u1|I2S_Controller:u0|Equal~229
TB1L1 = !TB1_mST[1] & !TB1_mST[2];


--TB1_mST[4] is I2S_LCM_Config:u1|I2S_Controller:u0|mST[4]
TB1_mST[4] = DFFEAS(TB1L93, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  , !D1_mI2S_STR,  );


--TB1_mST[0] is I2S_LCM_Config:u1|I2S_Controller:u0|mST[0]
TB1_mST[0] = DFFEAS(TB1L81, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  , !D1_mI2S_STR,  );


--TB1_mST[3] is I2S_LCM_Config:u1|I2S_Controller:u0|mST[3]
TB1_mST[3] = DFFEAS(TB1L90, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  , !D1_mI2S_STR,  );


--TB1L95 is I2S_LCM_Config:u1|I2S_Controller:u0|oRDY~91
TB1L95 = TB1L1 & TB1_mST[4] & TB1_mST[0] & !TB1_mST[3];


--TB1L2 is I2S_LCM_Config:u1|I2S_Controller:u0|Equal~230
TB1L2 = TB1_mST[3] & TB1L1 & !TB1_mST[4] & !TB1_mST[0];


--TB1L78 is I2S_LCM_Config:u1|I2S_Controller:u0|mSDATA~60
TB1L78 = TB1L20Q & !TB1L95 & !TB1L2;


--K1L12 is touch_spi:u11|Equal~524
K1L12 = K1_spi_ctrl_cnt[1] # K1_spi_ctrl_cnt[6] # K1_spi_ctrl_cnt[0] # !K1L1;


--K1L114 is touch_spi:u11|mdclk~191
K1L114 = K1_transmit_en & K1L12 & K1L7;


--K1L115 is touch_spi:u11|mdclk~192
K1L115 = K1_mdclk & (!K1L114) # !K1_mdclk & !K1L2 & K1L114;


--K1_d2_PENIRQ_n is touch_spi:u11|d2_PENIRQ_n
K1_d2_PENIRQ_n = DFFEAS(K1_d1_PENIRQ_n, div[10], J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1_d1_PENIRQ_n is touch_spi:u11|d1_PENIRQ_n
K1_d1_PENIRQ_n = DFFEAS(TCH_PENIRQ, div[10], J1_oRST_0,  ,  ,  ,  ,  ,  );


--K1L187 is touch_spi:u11|touch_irq~0
K1L187 = K1_d2_PENIRQ_n & !K1_d1_PENIRQ_n;


--K1L189 is touch_spi:u11|transmit_en~38
K1L189 = K1_transmit_en & (!K1L27 # !TCH_PENIRQ) # !K1_transmit_en & K1L187 & (!K1L27 # !TCH_PENIRQ);


--J1L3 is Reset_Delay:u9|Cont[0]~1056
J1L3 = J1_Cont[0] $ VCC;

--J1L4 is Reset_Delay:u9|Cont[0]~1057
J1L4 = CARRY(J1_Cont[0]);


--J1L75 is Reset_Delay:u9|Equal~217
J1L75 = !J1_Cont[21] # !J1L73 # !J1_Cont[20] # !J1L72;


--J1L6 is Reset_Delay:u9|Cont[1]~1058
J1L6 = J1_Cont[1] & !J1L4 # !J1_Cont[1] & (J1L4 # GND);

--J1L7 is Reset_Delay:u9|Cont[1]~1059
J1L7 = CARRY(!J1L4 # !J1_Cont[1]);


--J1L9 is Reset_Delay:u9|Cont[2]~1060
J1L9 = J1_Cont[2] & (J1L7 $ GND) # !J1_Cont[2] & !J1L7 & VCC;

--J1L10 is Reset_Delay:u9|Cont[2]~1061
J1L10 = CARRY(J1_Cont[2] & !J1L7);


--J1L12 is Reset_Delay:u9|Cont[3]~1062
J1L12 = J1_Cont[3] & !J1L10 # !J1_Cont[3] & (J1L10 # GND);

--J1L13 is Reset_Delay:u9|Cont[3]~1063
J1L13 = CARRY(!J1L10 # !J1_Cont[3]);


--J1L15 is Reset_Delay:u9|Cont[4]~1064
J1L15 = J1_Cont[4] & (J1L13 $ GND) # !J1_Cont[4] & !J1L13 & VCC;

--J1L16 is Reset_Delay:u9|Cont[4]~1065
J1L16 = CARRY(J1_Cont[4] & !J1L13);


--J1L18 is Reset_Delay:u9|Cont[5]~1066
J1L18 = J1_Cont[5] & !J1L16 # !J1_Cont[5] & (J1L16 # GND);

--J1L19 is Reset_Delay:u9|Cont[5]~1067
J1L19 = CARRY(!J1L16 # !J1_Cont[5]);


--J1L21 is Reset_Delay:u9|Cont[6]~1068
J1L21 = J1_Cont[6] & (J1L19 $ GND) # !J1_Cont[6] & !J1L19 & VCC;

--J1L22 is Reset_Delay:u9|Cont[6]~1069
J1L22 = CARRY(J1_Cont[6] & !J1L19);


--J1L24 is Reset_Delay:u9|Cont[7]~1070
J1L24 = J1_Cont[7] & !J1L22 # !J1_Cont[7] & (J1L22 # GND);

--J1L25 is Reset_Delay:u9|Cont[7]~1071
J1L25 = CARRY(!J1L22 # !J1_Cont[7]);


--J1L27 is Reset_Delay:u9|Cont[8]~1072
J1L27 = J1_Cont[8] & (J1L25 $ GND) # !J1_Cont[8] & !J1L25 & VCC;

--J1L28 is Reset_Delay:u9|Cont[8]~1073
J1L28 = CARRY(J1_Cont[8] & !J1L25);


--J1L30 is Reset_Delay:u9|Cont[9]~1074
J1L30 = J1_Cont[9] & !J1L28 # !J1_Cont[9] & (J1L28 # GND);

--J1L31 is Reset_Delay:u9|Cont[9]~1075
J1L31 = CARRY(!J1L28 # !J1_Cont[9]);


--J1L33 is Reset_Delay:u9|Cont[10]~1076
J1L33 = J1_Cont[10] & (J1L31 $ GND) # !J1_Cont[10] & !J1L31 & VCC;

--J1L34 is Reset_Delay:u9|Cont[10]~1077
J1L34 = CARRY(J1_Cont[10] & !J1L31);


--J1L36 is Reset_Delay:u9|Cont[11]~1078
J1L36 = J1_Cont[11] & !J1L34 # !J1_Cont[11] & (J1L34 # GND);

--J1L37 is Reset_Delay:u9|Cont[11]~1079
J1L37 = CARRY(!J1L34 # !J1_Cont[11]);


--J1L39 is Reset_Delay:u9|Cont[12]~1080
J1L39 = J1_Cont[12] & (J1L37 $ GND) # !J1_Cont[12] & !J1L37 & VCC;

--J1L40 is Reset_Delay:u9|Cont[12]~1081
J1L40 = CARRY(J1_Cont[12] & !J1L37);


--J1L42 is Reset_Delay:u9|Cont[13]~1082
J1L42 = J1_Cont[13] & !J1L40 # !J1_Cont[13] & (J1L40 # GND);

--J1L43 is Reset_Delay:u9|Cont[13]~1083
J1L43 = CARRY(!J1L40 # !J1_Cont[13]);


--J1L45 is Reset_Delay:u9|Cont[14]~1084
J1L45 = J1_Cont[14] & (J1L43 $ GND) # !J1_Cont[14] & !J1L43 & VCC;

--J1L46 is Reset_Delay:u9|Cont[14]~1085
J1L46 = CARRY(J1_Cont[14] & !J1L43);


--J1L48 is Reset_Delay:u9|Cont[15]~1086
J1L48 = J1_Cont[15] & !J1L46 # !J1_Cont[15] & (J1L46 # GND);

--J1L49 is Reset_Delay:u9|Cont[15]~1087
J1L49 = CARRY(!J1L46 # !J1_Cont[15]);


--J1L51 is Reset_Delay:u9|Cont[16]~1088
J1L51 = J1_Cont[16] & (J1L49 $ GND) # !J1_Cont[16] & !J1L49 & VCC;

--J1L52 is Reset_Delay:u9|Cont[16]~1089
J1L52 = CARRY(J1_Cont[16] & !J1L49);


--J1L54 is Reset_Delay:u9|Cont[17]~1090
J1L54 = J1_Cont[17] & !J1L52 # !J1_Cont[17] & (J1L52 # GND);

--J1L55 is Reset_Delay:u9|Cont[17]~1091
J1L55 = CARRY(!J1L52 # !J1_Cont[17]);


--J1L57 is Reset_Delay:u9|Cont[18]~1092
J1L57 = J1_Cont[18] & (J1L55 $ GND) # !J1_Cont[18] & !J1L55 & VCC;

--J1L58 is Reset_Delay:u9|Cont[18]~1093
J1L58 = CARRY(J1_Cont[18] & !J1L55);


--J1L60 is Reset_Delay:u9|Cont[19]~1094
J1L60 = J1_Cont[19] & !J1L58 # !J1_Cont[19] & (J1L58 # GND);

--J1L61 is Reset_Delay:u9|Cont[19]~1095
J1L61 = CARRY(!J1L58 # !J1_Cont[19]);


--J1L63 is Reset_Delay:u9|Cont[20]~1096
J1L63 = J1_Cont[20] & (J1L61 $ GND) # !J1_Cont[20] & !J1L61 & VCC;

--J1L64 is Reset_Delay:u9|Cont[20]~1097
J1L64 = CARRY(J1_Cont[20] & !J1L61);


--J1L66 is Reset_Delay:u9|Cont[21]~1098
J1L66 = J1_Cont[21] $ J1L64;


--UB1L13 is I2C_AV_Config:u2|I2C_Controller:u0|END~124
UB1L13 = UB1L60Q & UB1L48Q & UB1L54Q & UB1L57Q;


--UB1L14 is I2C_AV_Config:u2|I2C_Controller:u0|END~125
UB1L14 = UB1L51Q & (UB1L13 & (UB1L63Q) # !UB1L13 & UB1_END) # !UB1L51Q & (UB1_END);


--UB1_ACK3 is I2C_AV_Config:u2|I2C_Controller:u0|ACK3
UB1_ACK3 = DFFEAS(UB1L11, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--UB1_ACK1 is I2C_AV_Config:u2|I2C_Controller:u0|ACK1
UB1_ACK1 = DFFEAS(UB1L3, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--UB1_ACK2 is I2C_AV_Config:u2|I2C_Controller:u0|ACK2
UB1_ACK2 = DFFEAS(UB1L8, E1_mI2C_CTRL_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--E1L124 is I2C_AV_Config:u2|mSetup_ST~124
E1L124 = !UB1_ACK3 & !UB1_ACK1 & !UB1_ACK2;


--E1L125 is I2C_AV_Config:u2|mSetup_ST~125
E1L125 = E1_mSetup_ST.0001 & E1L124 & !UB1_END;


--E1_mSetup_ST.0000 is I2C_AV_Config:u2|mSetup_ST.0000
E1_mSetup_ST.0000 = DFFEAS(E1L49, E1_mI2C_CTRL_CLK, J1_oRST_0,  , E1L44,  ,  ,  ,  );


--E1L48 is I2C_AV_Config:u2|Select~136
E1L48 = E1_mSetup_ST.0001 & UB1_END # !E1_mSetup_ST.0000;


--E1L20 is I2C_AV_Config:u2|LUT_INDEX[0]~600
E1L20 = E1_LUT_INDEX[0] $ VCC;

--E1L21 is I2C_AV_Config:u2|LUT_INDEX[0]~601
E1L21 = CARRY(E1_LUT_INDEX[0]);


--E1L35 is I2C_AV_Config:u2|LUT_INDEX[5]~0
E1L35 = E1_mSetup_ST.0010 & E1L44;


--E1L23 is I2C_AV_Config:u2|LUT_INDEX[1]~602
E1L23 = E1_LUT_INDEX[1] & !E1L21 # !E1_LUT_INDEX[1] & (E1L21 # GND);

--E1L24 is I2C_AV_Config:u2|LUT_INDEX[1]~603
E1L24 = CARRY(!E1L21 # !E1_LUT_INDEX[1]);


--E1L26 is I2C_AV_Config:u2|LUT_INDEX[2]~604
E1L26 = E1_LUT_INDEX[2] & (E1L24 $ GND) # !E1_LUT_INDEX[2] & !E1L24 & VCC;

--E1L27 is I2C_AV_Config:u2|LUT_INDEX[2]~605
E1L27 = CARRY(E1_LUT_INDEX[2] & !E1L24);


--E1L29 is I2C_AV_Config:u2|LUT_INDEX[3]~606
E1L29 = E1_LUT_INDEX[3] & !E1L27 # !E1_LUT_INDEX[3] & (E1L27 # GND);

--E1L30 is I2C_AV_Config:u2|LUT_INDEX[3]~607
E1L30 = CARRY(!E1L27 # !E1_LUT_INDEX[3]);


--E1L32 is I2C_AV_Config:u2|LUT_INDEX[4]~608
E1L32 = E1_LUT_INDEX[4] & (E1L30 $ GND) # !E1_LUT_INDEX[4] & !E1L30 & VCC;

--E1L33 is I2C_AV_Config:u2|LUT_INDEX[4]~609
E1L33 = CARRY(E1_LUT_INDEX[4] & !E1L30);


--E1L36 is I2C_AV_Config:u2|LUT_INDEX[5]~610
E1L36 = E1_LUT_INDEX[5] $ E1L33;


--PB3_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[1]
PB3_Q[1] = AMPP_FUNCTION(A1L464, C1L33, C1_CLRN_SIGNAL, PB3L5);


--EB1_status_out[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[0]
EB1_status_out[0] = AMPP_FUNCTION(div[13], EB1L6, !B1_reset_all);


--DB1_post_trigger_count_enable is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable
DB1_post_trigger_count_enable = AMPP_FUNCTION(div[13], DB1L7, !B1_reset_all);


--S1_dffs[5] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[5]
S1_dffs[5] = AMPP_FUNCTION(A1L464, S1_dffs[6], !B1_reset_all, P1_trigger_setup_ena);


--P1L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|ela_status~81
P1L2 = AMPP_FUNCTION(EB1_status_out[0], DB1_post_trigger_count_enable, S1_dffs[5]);


--C1L32 is sld_hub:sld_hub_inst|IRSR_D[0]~413
C1L32 = AMPP_FUNCTION(PB3_Q[1], P1L2, RB1_state[4]);


--C1_CLRN_SIGNAL is sld_hub:sld_hub_inst|CLRN_SIGNAL
C1_CLRN_SIGNAL = AMPP_FUNCTION(A1L464, C1L4);


--PB3_Q[3] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[3]
PB3_Q[3] = AMPP_FUNCTION(A1L464, C1L37, C1_CLRN_SIGNAL, PB3L5);


--PB3_Q[7] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[7]
PB3_Q[7] = AMPP_FUNCTION(A1L464, PB3L13, C1_CLRN_SIGNAL);


--SB1_dffe1a[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[3]
SB1_dffe1a[3] = AMPP_FUNCTION(A1L464, SB1_w_anode38w[3], C1_CLRN_SIGNAL, C1L6);


--PB3L3 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~208
PB3L3 = AMPP_FUNCTION(RB1_state[4], PB3_Q[3], PB3_Q[7], SB1_dffe1a[3]);


--PB3L4 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~209
PB3L4 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, RB1_state[3], RB1_state[4]);


--C1_OK_TO_UPDATE_IR_Q is sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q
C1_OK_TO_UPDATE_IR_Q = AMPP_FUNCTION(A1L464, C1L49);


--C1L28 is sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21
C1L28 = AMPP_FUNCTION(A1L466, RB1_state[4], C1_jtag_debug_mode_usr1, C1_OK_TO_UPDATE_IR_Q);


--PB2_Q[0] is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]
PB2_Q[0] = AMPP_FUNCTION(A1L464, PB2L3, C1_CLRN_SIGNAL);


--C1L47 is sld_hub:sld_hub_inst|node_ena~18
C1L47 = AMPP_FUNCTION(PB6_Q[0], PB2_Q[0]);


--C1_jtag_debug_mode is sld_hub:sld_hub_inst|jtag_debug_mode
C1_jtag_debug_mode = AMPP_FUNCTION(A1L464, C1L46, RB1_state[0]);


--B1L77 is sld_signaltap:auto_signaltap_0|bypass_reg_out~43
B1L77 = AMPP_FUNCTION(altera_internal_jtag, B1_bypass_reg_out, C1L47, C1_jtag_debug_mode);


--PB4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0]
PB4_Q[0] = AMPP_FUNCTION(A1L464, C1L23, C1_CLRN_SIGNAL, C1L31);


--B1_reset_all is sld_signaltap:auto_signaltap_0|reset_all
B1_reset_all = AMPP_FUNCTION(PB4_Q[0], C1_CLRN_SIGNAL);


--PB5_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[5]
PB5_Q[5] = AMPP_FUNCTION(A1L464, PB3_Q[5], C1_CLRN_SIGNAL, C1L11);


--PB3_Q[5] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[5]
PB3_Q[5] = AMPP_FUNCTION(A1L464, C1L39, C1_CLRN_SIGNAL, PB3L5);


--C1L27 is sld_hub:sld_hub_inst|IRF_D[1][5]~45
C1L27 = AMPP_FUNCTION(PB5_Q[5], PB3_Q[5], PB2_Q[0]);


--SB1_dffe1a[2] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[2]
SB1_dffe1a[2] = AMPP_FUNCTION(A1L464, SB1_w_anode28w[3], C1_CLRN_SIGNAL, C1L6);


--C1L30 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~76
C1L30 = AMPP_FUNCTION(PB7_Q[0], SB1_dffe1a[2], PB6_Q[0], PB2_Q[0]);


--RB1_state[5] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5]
RB1_state[5] = AMPP_FUNCTION(A1L464, RB1L22);


--C1L31 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~77
C1L31 = AMPP_FUNCTION(C1_OK_TO_UPDATE_IR_Q, C1L30, RB1_state[5]);


--PB5_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[3]
PB5_Q[3] = AMPP_FUNCTION(A1L464, PB3_Q[3], C1_CLRN_SIGNAL, C1L11);


--C1L25 is sld_hub:sld_hub_inst|IRF_D[1][3]~46
C1L25 = AMPP_FUNCTION(PB5_Q[3], PB3_Q[3], PB2_Q[0]);


--PB5_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[4]
PB5_Q[4] = AMPP_FUNCTION(A1L464, PB3_Q[4], C1_CLRN_SIGNAL, C1L11);


--PB3_Q[4] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[4]
PB3_Q[4] = AMPP_FUNCTION(A1L464, C1L38, C1_CLRN_SIGNAL, PB3L5);


--C1L26 is sld_hub:sld_hub_inst|IRF_D[1][4]~47
C1L26 = AMPP_FUNCTION(PB5_Q[4], PB3_Q[4], PB2_Q[0]);


--S1_dffs[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[1]
S1_dffs[1] = AMPP_FUNCTION(A1L464, S1_dffs[2], !B1_reset_all, P1_trigger_setup_ena);


--B1L79 is sld_signaltap:auto_signaltap_0|sdr~14
B1L79 = AMPP_FUNCTION(PB6_Q[0], C1_jtag_debug_mode, C1_jtag_debug_mode_usr1, PB2_Q[0]);


--P1_trigger_setup_ena is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|trigger_setup_ena
P1_trigger_setup_ena = AMPP_FUNCTION(RB1_state[4], PB4_Q[3], B1L79);


--N1_WORD_SR[1] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[1]
N1_WORD_SR[1] = AMPP_FUNCTION(A1L464, N1L23, N1L16);


--N1_word_counter[2] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[2]
N1_word_counter[2] = AMPP_FUNCTION(A1L464, N1L12, N1L6);


--N1_word_counter[1] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[1]
N1_word_counter[1] = AMPP_FUNCTION(A1L464, N1L13, N1L6);


--N1_word_counter[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[0]
N1_word_counter[0] = AMPP_FUNCTION(A1L464, N1L10, N1L6);


--N1L20 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~959
N1L20 = AMPP_FUNCTION(N1_word_counter[2], N1_word_counter[1], N1_word_counter[0]);


--N2_clear_signal is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|clear_signal
N2_clear_signal = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, RB1_state[8]);


--N1L21 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~960
N1L21 = AMPP_FUNCTION(N1_WORD_SR[1], N1L20, RB1_state[4], N2_clear_signal);


--N1L16 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]~961
N1L16 = AMPP_FUNCTION(RB1L21, C1_jtag_debug_mode_usr1, RB1_state[8], B1L79);


--S4_dffs[1] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[1]
S4_dffs[1] = AMPP_FUNCTION(A1L464, S4L2, !B1_reset_all);


--Q1_is_max_write_address_ff is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff
Q1_is_max_write_address_ff = AMPP_FUNCTION(div[13], Q1L3, !B1_reset_all);


--S4L1 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1568
S4L1 = AMPP_FUNCTION(S4_dffs[1], Q1_is_max_write_address_ff, RB1_state[4], B1L79);


--N2_WORD_SR[1] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[1]
N2_WORD_SR[1] = AMPP_FUNCTION(A1L464, N2L32, N2L23);


--N2_word_counter[3] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]
N2_word_counter[3] = AMPP_FUNCTION(A1L464, N2L15, N2L7, N2L6);


--N2_word_counter[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]
N2_word_counter[0] = AMPP_FUNCTION(A1L464, N2L4, N2L7, N2L6);


--N2_word_counter[1] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]
N2_word_counter[1] = AMPP_FUNCTION(A1L464, N2L9, N2L7, N2L6);


--N2_word_counter[2] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[2]
N2_word_counter[2] = AMPP_FUNCTION(A1L464, N2L12, N2L7, N2L6);


--N2L26 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1210
N2L26 = AMPP_FUNCTION(N2_word_counter[3], N2_word_counter[0], N2_word_counter[1], N2_word_counter[2]);


--N2L27 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1211
N2L27 = AMPP_FUNCTION(N2_word_counter[3], N2_word_counter[0], N2_word_counter[1], N2_word_counter[2]);


--N2_word_counter[4] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[4]
N2_word_counter[4] = AMPP_FUNCTION(A1L464, N2L18, N2L7, N2L6);


--N2L28 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1212
N2L28 = AMPP_FUNCTION(N2L26, N2L27, N2_word_counter[4]);


--N2L29 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1213
N2L29 = AMPP_FUNCTION(N2_WORD_SR[1], N2L28, RB1_state[4], N2_clear_signal);


--C1_jtag_debug_mode_usr0 is sld_hub:sld_hub_inst|jtag_debug_mode_usr0
C1_jtag_debug_mode_usr0 = AMPP_FUNCTION(A1L464, C1L10, RB1_state[0], RB1_state[12]);


--C1L13 is sld_hub:sld_hub_inst|HUB_BYPASS_REG~11
C1L13 = AMPP_FUNCTION(altera_internal_jtag, RB1_state[4]);


--C1L44 is sld_hub:sld_hub_inst|jtag_debug_mode~2
C1L44 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, C1_jtag_debug_mode_usr0);


--PB3_Q[2] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2]
PB3_Q[2] = AMPP_FUNCTION(A1L464, C1L36, C1_CLRN_SIGNAL, PB3L5);


--SB1_w_anode1w[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|w_anode1w[3]
SB1_w_anode1w[3] = AMPP_FUNCTION(C1L44, PB3_Q[1], PB3_Q[3], PB3_Q[2]);


--C1L29 is sld_hub:sld_hub_inst|IRF_ENA_ENABLE~22
C1L29 = AMPP_FUNCTION(RB1_state[4], C1_jtag_debug_mode_usr1);


--C1L5 is sld_hub:sld_hub_inst|comb~51
C1L5 = AMPP_FUNCTION(RB1_state[3], C1_jtag_debug_mode_usr0);


--C1L6 is sld_hub:sld_hub_inst|comb~52
C1L6 = AMPP_FUNCTION(A1L466, C1L29, C1L5, altera_internal_jtag);


--S5_dffs[1] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[1]
S5_dffs[1] = AMPP_FUNCTION(A1L464, S5_dffs[2], RB1_state[0], RB1_state[11]);


--S5_dffs[9] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]
S5_dffs[9] = AMPP_FUNCTION(A1L464, altera_internal_jtag, RB1_state[0], RB1_state[11]);


--S5_dffs[8] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[8]
S5_dffs[8] = AMPP_FUNCTION(A1L464, S5_dffs[9], RB1_state[0], RB1_state[11]);


--S5_dffs[7] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[7]
S5_dffs[7] = AMPP_FUNCTION(A1L464, S5_dffs[8], RB1_state[0], RB1_state[11]);


--S5_dffs[6] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[6]
S5_dffs[6] = AMPP_FUNCTION(A1L464, S5_dffs[7], RB1_state[0], RB1_state[11]);


--C1L7 is sld_hub:sld_hub_inst|Equal~139
C1L7 = AMPP_FUNCTION(S5_dffs[9], S5_dffs[8], S5_dffs[7], S5_dffs[6]);


--S5_dffs[3] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3]
S5_dffs[3] = AMPP_FUNCTION(A1L464, S5_dffs[4], RB1_state[0], RB1_state[11]);


--S5_dffs[2] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[2]
S5_dffs[2] = AMPP_FUNCTION(A1L464, S5_dffs[3], RB1_state[0], RB1_state[11]);


--S5_dffs[5] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[5]
S5_dffs[5] = AMPP_FUNCTION(A1L464, S5_dffs[6], RB1_state[0], RB1_state[11]);


--S5_dffs[4] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4]
S5_dffs[4] = AMPP_FUNCTION(A1L464, S5_dffs[5], RB1_state[0], RB1_state[11]);


--C1L8 is sld_hub:sld_hub_inst|Equal~140
C1L8 = AMPP_FUNCTION(S5_dffs[3], S5_dffs[2], S5_dffs[5], S5_dffs[4]);


--S5_dffs[0] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[0]
S5_dffs[0] = AMPP_FUNCTION(A1L464, S5_dffs[1], RB1_state[0], RB1_state[11]);


--C1L9 is sld_hub:sld_hub_inst|Equal~141
C1L9 = AMPP_FUNCTION(S5_dffs[1], C1L7, C1L8, S5_dffs[0]);


--RB1_state[0] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0]
RB1_state[0] = AMPP_FUNCTION(A1L464, RB1L32);


--RB1_state[12] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12]
RB1_state[12] = AMPP_FUNCTION(A1L464, RB1L33);


--RB1_state[2] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]
RB1_state[2] = AMPP_FUNCTION(A1L464, RB1L34);


--RB1L19 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~10
RB1L19 = AMPP_FUNCTION(RB1_state[2], A1L466);


--RB1_state[7] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7]
RB1_state[7] = AMPP_FUNCTION(A1L464, RB1L24);


--RB1L20 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~11
RB1L20 = AMPP_FUNCTION(RB1_state[3], RB1_state[4], RB1_state[7]);


--RB1L25 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~18
RB1L25 = AMPP_FUNCTION(RB1_state[7], RB1_state[5]);


--UB1L65 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1283
UB1L65 = UB1L48Q & UB1L54Q & UB1L57Q & UB1L51Q;


--UB1_SD[2] is I2C_AV_Config:u2|I2C_Controller:u0|SD[2]
UB1_SD[2] = DFFEAS(E1_mI2C_DATA[2], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[8] is I2C_AV_Config:u2|I2C_Controller:u0|SD[8]
UB1_SD[8] = DFFEAS(E1_mI2C_DATA[8], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[9] is I2C_AV_Config:u2|I2C_Controller:u0|SD[9]
UB1_SD[9] = DFFEAS(E1_mI2C_DATA[9], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L66 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1284
UB1L66 = UB1L57Q & (UB1L48Q & (UB1_SD[9]) # !UB1L48Q & UB1_SD[8]) # !UB1L57Q & (!UB1L48Q);


--UB1_SD[1] is I2C_AV_Config:u2|I2C_Controller:u0|SD[1]
UB1_SD[1] = DFFEAS(E1_mI2C_DATA[1], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L67 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1285
UB1L67 = UB1L57Q & (UB1L66) # !UB1L57Q & (UB1L66 & (UB1_SD[1]) # !UB1L66 & UB1_SD[2]);


--UB1_SD[7] is I2C_AV_Config:u2|I2C_Controller:u0|SD[7]
UB1_SD[7] = DFFEAS(E1_mI2C_DATA[7], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[0] is I2C_AV_Config:u2|I2C_Controller:u0|SD[0]
UB1_SD[0] = DFFEAS(E1_mI2C_DATA[0], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L68 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1286
UB1L68 = UB1L48Q & (UB1_SD[0] # UB1L57Q) # !UB1L48Q & (UB1_SD[7] # !UB1L57Q);


--UB1_SD[10] is I2C_AV_Config:u2|I2C_Controller:u0|SD[10]
UB1_SD[10] = DFFEAS(E1_mI2C_DATA[10], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[4] is I2C_AV_Config:u2|I2C_Controller:u0|SD[4]
UB1_SD[4] = DFFEAS(E1_mI2C_DATA[4], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[11] is I2C_AV_Config:u2|I2C_Controller:u0|SD[11]
UB1_SD[11] = DFFEAS(E1_mI2C_DATA[11], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L69 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1287
UB1L69 = UB1L48Q & (UB1L57Q & (UB1_SD[11]) # !UB1L57Q & UB1_SD[4]) # !UB1L48Q & (!UB1L57Q);


--UB1_SD[3] is I2C_AV_Config:u2|I2C_Controller:u0|SD[3]
UB1_SD[3] = DFFEAS(E1_mI2C_DATA[3], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L70 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1288
UB1L70 = UB1L48Q & (UB1L69) # !UB1L48Q & (UB1L69 & (UB1_SD[3]) # !UB1L69 & UB1_SD[10]);


--UB1L71 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1289
UB1L71 = UB1L51Q & (UB1L54Q & (UB1L70) # !UB1L54Q & UB1L68) # !UB1L51Q & (!UB1L54Q);


--UB1_SD[6] is I2C_AV_Config:u2|I2C_Controller:u0|SD[6]
UB1_SD[6] = DFFEAS(E1_mI2C_DATA[6], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[5] is I2C_AV_Config:u2|I2C_Controller:u0|SD[5]
UB1_SD[5] = DFFEAS(E1_mI2C_DATA[5], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L72 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1290
UB1L72 = UB1L48Q & UB1_SD[6] # !UB1L48Q & (UB1_SD[5]);


--UB1L73 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1291
UB1L73 = UB1L57Q & UB1L72 # !UB1L57Q & (!UB1L48Q & !UB1L25Q);


--UB1L74 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1292
UB1L74 = UB1L51Q & (UB1L71) # !UB1L51Q & (UB1L71 & (UB1L73) # !UB1L71 & UB1L67);


--UB1_SD[22] is I2C_AV_Config:u2|I2C_Controller:u0|SD[22]
UB1_SD[22] = DFFEAS(E1_mI2C_DATA[22], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[15] is I2C_AV_Config:u2|I2C_Controller:u0|SD[15]
UB1_SD[15] = DFFEAS(E1_mI2C_DATA[15], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1_SD[13] is I2C_AV_Config:u2|I2C_Controller:u0|SD[13]
UB1_SD[13] = DFFEAS(E1_mI2C_DATA[13], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L75 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1293
UB1L75 = UB1L51Q & UB1_SD[15] # !UB1L51Q & (UB1_SD[13]);


--UB1L76 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1294
UB1L76 = UB1L57Q & (UB1L51Q $ !UB1_SD[22]) # !UB1L57Q & (UB1L75);


--UB1L77 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1295
UB1L77 = !UB1L57Q & !UB1L51Q;


--UB1L78 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1296
UB1L78 = UB1L57Q & (UB1L51Q # !UB1L25Q) # !UB1L57Q & UB1L51Q & (!UB1_SD[22]);


--UB1L79 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1297
UB1L79 = UB1L54Q & (UB1L48Q & (UB1L78) # !UB1L48Q & UB1L77) # !UB1L54Q & (!UB1L48Q);


--UB1_SD[14] is I2C_AV_Config:u2|I2C_Controller:u0|SD[14]
UB1_SD[14] = DFFEAS(E1_mI2C_DATA[14], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L80 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1298
UB1L80 = UB1L57Q & (!UB1_SD[22]) # !UB1L57Q & UB1_SD[14];


--UB1_SD[12] is I2C_AV_Config:u2|I2C_Controller:u0|SD[12]
UB1_SD[12] = DFFEAS(E1_mI2C_DATA[12], E1_mI2C_CTRL_CLK,  ,  , UB1L43,  ,  ,  ,  );


--UB1L81 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1299
UB1L81 = UB1L51Q & UB1L80 # !UB1L51Q & (UB1_SD[12] & !UB1L57Q);


--UB1L82 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1300
UB1L82 = UB1L54Q & (UB1L79) # !UB1L54Q & (UB1L79 & (UB1L81) # !UB1L79 & UB1L76);


--UB1L83 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1301
UB1L83 = UB1L63Q & (UB1L60Q & (UB1L82) # !UB1L60Q & UB1L74) # !UB1L63Q & (!UB1L60Q);


--UB1L84 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1302
UB1L84 = UB1L63Q & (!UB1L83) # !UB1L63Q & UB1L25Q & (UB1L83 # !UB1L65);


--K1L107Q is touch_spi:u11|mdata_in[6]~reg0
K1L107Q = DFFEAS(K1L106, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--K1L108 is touch_spi:u11|mdata_in~564
K1L108 = K1L107Q # !K1_mdclk;


--K1L150 is touch_spi:u11|oADC_DIN~47
K1L150 = K1_transmit_en & K1L7 & (K1_mdclk # !K1L12);


--TB1_mI2S_CLK_DIV[12] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[12]
TB1_mI2S_CLK_DIV[12] = DFFEAS(TB1L63, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[13] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[13]
TB1_mI2S_CLK_DIV[13] = DFFEAS(TB1L66, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[14] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[14]
TB1_mI2S_CLK_DIV[14] = DFFEAS(TB1L69, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[15] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[15]
TB1_mI2S_CLK_DIV[15] = DFFEAS(TB1L72, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1L3 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~318
TB1L3 = !TB1_mI2S_CLK_DIV[12] & !TB1_mI2S_CLK_DIV[13] & !TB1_mI2S_CLK_DIV[14] & !TB1_mI2S_CLK_DIV[15];


--TB1_mI2S_CLK_DIV[2] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[2]
TB1_mI2S_CLK_DIV[2] = DFFEAS(TB1L33, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[3] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[3]
TB1_mI2S_CLK_DIV[3] = DFFEAS(TB1L36, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[4] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[4]
TB1_mI2S_CLK_DIV[4] = DFFEAS(TB1L39, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[5] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[5]
TB1_mI2S_CLK_DIV[5] = DFFEAS(TB1L42, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1L4 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~319
TB1L4 = !TB1_mI2S_CLK_DIV[2] & !TB1_mI2S_CLK_DIV[3] & !TB1_mI2S_CLK_DIV[4] & !TB1_mI2S_CLK_DIV[5];


--TB1_mI2S_CLK_DIV[6] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[6]
TB1_mI2S_CLK_DIV[6] = DFFEAS(TB1L45, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[7] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[7]
TB1_mI2S_CLK_DIV[7] = DFFEAS(TB1L48, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[8] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[8]
TB1_mI2S_CLK_DIV[8] = DFFEAS(TB1L51, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1L5 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~320
TB1L5 = TB1L4 # !TB1_mI2S_CLK_DIV[8] # !TB1_mI2S_CLK_DIV[7] # !TB1_mI2S_CLK_DIV[6];


--TB1_mI2S_CLK_DIV[9] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[9]
TB1_mI2S_CLK_DIV[9] = DFFEAS(TB1L54, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[10] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[10]
TB1_mI2S_CLK_DIV[10] = DFFEAS(TB1L57, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1L6 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~321
TB1L6 = !TB1_mI2S_CLK_DIV[9] & !TB1_mI2S_CLK_DIV[10];


--TB1_mI2S_CLK_DIV[11] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[11]
TB1_mI2S_CLK_DIV[11] = DFFEAS(TB1L60, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1L7 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~322
TB1L7 = TB1_mI2S_CLK_DIV[11] & (!TB1L6 # !TB1L5) # !TB1L3;


--TB1L74 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK~77
TB1L74 = TB1_mI2S_CLK $ TB1L7;


--div[2] is div[2]
div[2] = DFFEAS(A1L481, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--D1_mI2S_STR is I2S_LCM_Config:u1|mI2S_STR
D1_mI2S_STR = DFFEAS(D1L45, TB1_mI2S_CLK, J1_oRST_0,  , D1L44,  ,  ,  ,  );


--TB1L8 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~323
TB1L8 = TB1_mST[3] # TB1_mST[1] # TB1_mST[2] # TB1_mST[0];


--TB1L76 is I2S_LCM_Config:u1|I2S_Controller:u0|mSCLK~133
TB1L76 = D1_mI2S_STR & (TB1L8 & TB1_mSCLK # !TB1L8 & (!TB1_mST[4]));


--D1_LUT_INDEX[2] is I2S_LCM_Config:u1|LUT_INDEX[2]
D1_LUT_INDEX[2] = DFFEAS(D1L31, TB1_mI2S_CLK, J1_oRST_0,  , D1L40,  ,  ,  ,  );


--D1_LUT_INDEX[4] is I2S_LCM_Config:u1|LUT_INDEX[4]
D1_LUT_INDEX[4] = DFFEAS(D1L37, TB1_mI2S_CLK, J1_oRST_0,  , D1L40,  ,  ,  ,  );


--D1_LUT_INDEX[5] is I2S_LCM_Config:u1|LUT_INDEX[5]
D1_LUT_INDEX[5] = DFFEAS(D1L41, TB1_mI2S_CLK, J1_oRST_0,  , D1L40,  ,  ,  ,  );


--D1_LUT_INDEX[3] is I2S_LCM_Config:u1|LUT_INDEX[3]
D1_LUT_INDEX[3] = DFFEAS(D1L34, TB1_mI2S_CLK, J1_oRST_0,  , D1L40,  ,  ,  ,  );


--D1_LUT_INDEX[0] is I2S_LCM_Config:u1|LUT_INDEX[0]
D1_LUT_INDEX[0] = DFFEAS(D1L25, TB1_mI2S_CLK, J1_oRST_0,  , D1L40,  ,  ,  ,  );


--D1_LUT_INDEX[1] is I2S_LCM_Config:u1|LUT_INDEX[1]
D1_LUT_INDEX[1] = DFFEAS(D1L28, TB1_mI2S_CLK, J1_oRST_0,  , D1L40,  ,  ,  ,  );


--D1L43 is I2S_LCM_Config:u1|LessThan~88
D1L43 = D1_LUT_INDEX[3] # D1_LUT_INDEX[0] & D1_LUT_INDEX[1];


--D1L44 is I2S_LCM_Config:u1|LessThan~89
D1L44 = !D1_LUT_INDEX[5] & (!D1_LUT_INDEX[2] & !D1L43 # !D1_LUT_INDEX[4]);


--H1L55 is Touch_Panel_Tining:u7|add~317
H1L55 = H1L41Q $ VCC;

--H1L56 is Touch_Panel_Tining:u7|add~318
H1L56 = CARRY(H1L41Q);


--H1L57 is Touch_Panel_Tining:u7|add~319
H1L57 = H1L42Q & !H1L56 # !H1L42Q & (H1L56 # GND);

--H1L58 is Touch_Panel_Tining:u7|add~320
H1L58 = CARRY(!H1L56 # !H1L42Q);


--H1L59 is Touch_Panel_Tining:u7|add~321
H1L59 = H1L43Q & (H1L58 $ GND) # !H1L43Q & !H1L58 & VCC;

--H1L60 is Touch_Panel_Tining:u7|add~322
H1L60 = CARRY(H1L43Q & !H1L58);


--H1L61 is Touch_Panel_Tining:u7|add~323
H1L61 = H1L44Q & !H1L60 # !H1L44Q & (H1L60 # GND);

--H1L62 is Touch_Panel_Tining:u7|add~324
H1L62 = CARRY(!H1L60 # !H1L44Q);


--H1L63 is Touch_Panel_Tining:u7|add~325
H1L63 = H1L45Q & (H1L62 $ GND) # !H1L45Q & !H1L62 & VCC;

--H1L64 is Touch_Panel_Tining:u7|add~326
H1L64 = CARRY(H1L45Q & !H1L62);


--H1L65 is Touch_Panel_Tining:u7|add~327
H1L65 = H1L46Q & !H1L64 # !H1L46Q & (H1L64 # GND);

--H1L66 is Touch_Panel_Tining:u7|add~328
H1L66 = CARRY(!H1L64 # !H1L46Q);


--H1L67 is Touch_Panel_Tining:u7|add~329
H1L67 = H1L47Q & (H1L66 $ GND) # !H1L47Q & !H1L66 & VCC;

--H1L68 is Touch_Panel_Tining:u7|add~330
H1L68 = CARRY(H1L47Q & !H1L66);


--H1L69 is Touch_Panel_Tining:u7|add~331
H1L69 = H1L48Q & !H1L68 # !H1L48Q & (H1L68 # GND);

--H1L70 is Touch_Panel_Tining:u7|add~332
H1L70 = CARRY(!H1L68 # !H1L48Q);


--H1L71 is Touch_Panel_Tining:u7|add~333
H1L71 = H1L49Q & (H1L70 $ GND) # !H1L49Q & !H1L70 & VCC;

--H1L72 is Touch_Panel_Tining:u7|add~334
H1L72 = CARRY(H1L49Q & !H1L70);


--H1L73 is Touch_Panel_Tining:u7|add~335
H1L73 = H1L50Q $ H1L72;


--H1L13 is Touch_Panel_Tining:u7|Equal~323
H1L13 = H1L44Q & H1L43Q & H1L50Q & !H1L41Q;


--H1L51 is Touch_Panel_Tining:u7|Y_cnt~821
H1L51 = H1L73 & (!H1L13 # !H1L12);


--J1_oRST_2 is Reset_Delay:u9|oRST_2
J1_oRST_2 = DFFEAS(J1L79, CLOCK_50, KEY[0],  ,  ,  ,  ,  ,  );


--H1L14 is Touch_Panel_Tining:u7|Equal~324
H1L14 = H1L32Q & H1L31Q & !H1L33Q & !H1L35Q;


--H1L15 is Touch_Panel_Tining:u7|Equal~325
H1L15 = !H1L34Q & !H1L37Q & !H1L36Q;


--H1L16 is Touch_Panel_Tining:u7|Equal~326
H1L16 = H1L38Q & H1L11 & H1L14 & H1L15;


--H1L52 is Touch_Panel_Tining:u7|Y_cnt~822
H1L52 = H1L55 & (!H1L13 # !H1L12);


--H1L53 is Touch_Panel_Tining:u7|Y_cnt~823
H1L53 = H1L61 & (!H1L13 # !H1L12);


--H1L54 is Touch_Panel_Tining:u7|Y_cnt~824
H1L54 = H1L59 & (!H1L13 # !H1L12);


--H1L75 is Touch_Panel_Tining:u7|add~337
H1L75 = H1L28Q $ VCC;

--H1L76 is Touch_Panel_Tining:u7|add~338
H1L76 = CARRY(H1L28Q);


--H1L77 is Touch_Panel_Tining:u7|add~339
H1L77 = H1L29Q & !H1L76 # !H1L29Q & (H1L76 # GND);

--H1L78 is Touch_Panel_Tining:u7|add~340
H1L78 = CARRY(!H1L76 # !H1L29Q);


--H1L79 is Touch_Panel_Tining:u7|add~341
H1L79 = H1L30Q & (H1L78 $ GND) # !H1L30Q & !H1L78 & VCC;

--H1L80 is Touch_Panel_Tining:u7|add~342
H1L80 = CARRY(H1L30Q & !H1L78);


--H1L81 is Touch_Panel_Tining:u7|add~343
H1L81 = H1L31Q & !H1L80 # !H1L31Q & (H1L80 # GND);

--H1L82 is Touch_Panel_Tining:u7|add~344
H1L82 = CARRY(!H1L80 # !H1L31Q);


--H1L83 is Touch_Panel_Tining:u7|add~345
H1L83 = H1L32Q & (H1L82 $ GND) # !H1L32Q & !H1L82 & VCC;

--H1L84 is Touch_Panel_Tining:u7|add~346
H1L84 = CARRY(H1L32Q & !H1L82);


--H1L85 is Touch_Panel_Tining:u7|add~347
H1L85 = H1L33Q & !H1L84 # !H1L33Q & (H1L84 # GND);

--H1L86 is Touch_Panel_Tining:u7|add~348
H1L86 = CARRY(!H1L84 # !H1L33Q);


--H1L39 is Touch_Panel_Tining:u7|X_cnt~254
H1L39 = H1L85 & !H1L16;


--H1L87 is Touch_Panel_Tining:u7|add~349
H1L87 = H1L34Q & (H1L86 $ GND) # !H1L34Q & !H1L86 & VCC;

--H1L88 is Touch_Panel_Tining:u7|add~350
H1L88 = CARRY(H1L34Q & !H1L86);


--H1L89 is Touch_Panel_Tining:u7|add~351
H1L89 = H1L35Q & !H1L88 # !H1L35Q & (H1L88 # GND);

--H1L90 is Touch_Panel_Tining:u7|add~352
H1L90 = CARRY(!H1L88 # !H1L35Q);


--H1L91 is Touch_Panel_Tining:u7|add~353
H1L91 = H1L36Q & (H1L90 $ GND) # !H1L36Q & !H1L90 & VCC;

--H1L92 is Touch_Panel_Tining:u7|add~354
H1L92 = CARRY(H1L36Q & !H1L90);


--H1L93 is Touch_Panel_Tining:u7|add~355
H1L93 = H1L37Q & !H1L92 # !H1L37Q & (H1L92 # GND);

--H1L94 is Touch_Panel_Tining:u7|add~356
H1L94 = CARRY(!H1L92 # !H1L37Q);


--H1L95 is Touch_Panel_Tining:u7|add~357
H1L95 = H1L38Q $ !H1L94;


--H1L40 is Touch_Panel_Tining:u7|X_cnt~255
H1L40 = H1L95 & !H1L16;


--H1L3 is Touch_Panel_Tining:u7|DENB~272
H1L3 = H1L37Q & (!H1L25 # !H1L9 # !H1L36Q) # !H1L37Q & H1L36Q;


--H1L4 is Touch_Panel_Tining:u7|DENB~273
H1L4 = H1L25 & (H1L33Q & (!H1L36Q) # !H1L33Q & H1L9);


--H1L5 is Touch_Panel_Tining:u7|DENB~274
H1L5 = !H1L38Q & !H1_Vsyn & (H1L3 # H1L4);


--H1L17 is Touch_Panel_Tining:u7|Equal~327
H1L17 = H1L20 & H1L12 & !H1L41Q & !H1L50Q;


--D1_mI2S_DATA[6] is I2S_LCM_Config:u1|mI2S_DATA[6]
D1_mI2S_DATA[6] = DFFEAS(D1L17, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[5] is I2S_LCM_Config:u1|mI2S_DATA[5]
D1_mI2S_DATA[5] = DFFEAS(D1L15, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[7] is I2S_LCM_Config:u1|mI2S_DATA[7]
D1_mI2S_DATA[7] = DFFEAS(D1L19, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L10 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~164
TB1L10 = TB1_mST[0] & (TB1_mST[1]) # !TB1_mST[0] & (TB1_mST[1] & D1_mI2S_DATA[5] # !TB1_mST[1] & (D1_mI2S_DATA[7]));


--D1_mI2S_DATA[4] is I2S_LCM_Config:u1|mI2S_DATA[4]
D1_mI2S_DATA[4] = DFFEAS(D1L13, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L11 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~165
TB1L11 = TB1_mST[0] & (TB1L10 & (D1_mI2S_DATA[4]) # !TB1L10 & D1_mI2S_DATA[6]) # !TB1_mST[0] & (TB1L10);


--D1_mI2S_DATA[8] is I2S_LCM_Config:u1|mI2S_DATA[8]
D1_mI2S_DATA[8] = DFFEAS(D1L74, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[10] is I2S_LCM_Config:u1|mI2S_DATA[10]
D1_mI2S_DATA[10] = DFFEAS(D1L76, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[11] is I2S_LCM_Config:u1|mI2S_DATA[11]
D1_mI2S_DATA[11] = DFFEAS(D1L77, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L12 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~166
TB1L12 = TB1_mST[0] & D1_mI2S_DATA[10] # !TB1_mST[0] & (D1_mI2S_DATA[11]);


--TB1L13 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~167
TB1L13 = TB1_mST[1] & TB1_mST[0] & D1_mI2S_DATA[8] # !TB1_mST[1] & (TB1L12);


--D1_mI2S_DATA[13] is I2S_LCM_Config:u1|mI2S_DATA[13]
D1_mI2S_DATA[13] = DFFEAS(D1L78, TB1_mI2S_CLK,  ,  , D1L50,  ,  , D1_LUT_INDEX[4],  );


--D1_mI2S_DATA[14] is I2S_LCM_Config:u1|mI2S_DATA[14]
D1_mI2S_DATA[14] = DFFEAS(D1L79, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[15] is I2S_LCM_Config:u1|mI2S_DATA[15]
D1_mI2S_DATA[15] = DFFEAS(D1L22, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L14 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~168
TB1L14 = TB1_mST[1] & (TB1_mST[0]) # !TB1_mST[1] & (TB1_mST[0] & D1_mI2S_DATA[14] # !TB1_mST[0] & (D1_mI2S_DATA[15]));


--D1_mI2S_DATA[12] is I2S_LCM_Config:u1|mI2S_DATA[12]
D1_mI2S_DATA[12] = DFFEAS(D1L80, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L15 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~169
TB1L15 = TB1_mST[1] & (TB1L14 & (D1_mI2S_DATA[12]) # !TB1L14 & D1_mI2S_DATA[13]) # !TB1_mST[1] & (TB1L14);


--TB1L16 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~170
TB1L16 = TB1_mST[3] & (TB1_mST[2]) # !TB1_mST[3] & (TB1_mST[2] & TB1L13 # !TB1_mST[2] & (TB1L15));


--D1_mI2S_DATA[1] is I2S_LCM_Config:u1|mI2S_DATA[1]
D1_mI2S_DATA[1] = DFFEAS(D1L7, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[2] is I2S_LCM_Config:u1|mI2S_DATA[2]
D1_mI2S_DATA[2] = DFFEAS(D1L9, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--D1_mI2S_DATA[3] is I2S_LCM_Config:u1|mI2S_DATA[3]
D1_mI2S_DATA[3] = DFFEAS(D1L11, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L17 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~171
TB1L17 = TB1_mST[1] & (TB1_mST[0]) # !TB1_mST[1] & (TB1_mST[0] & D1_mI2S_DATA[2] # !TB1_mST[0] & (D1_mI2S_DATA[3]));


--D1_mI2S_DATA[0] is I2S_LCM_Config:u1|mI2S_DATA[0]
D1_mI2S_DATA[0] = DFFEAS(D1L5, TB1_mI2S_CLK,  ,  , D1L50,  ,  ,  ,  );


--TB1L18 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~172
TB1L18 = TB1_mST[1] & (TB1L17 & (D1_mI2S_DATA[0]) # !TB1L17 & D1_mI2S_DATA[1]) # !TB1_mST[1] & (TB1L17);


--TB1L19 is I2S_LCM_Config:u1|I2S_Controller:u0|Mux~173
TB1L19 = TB1_mST[3] & (TB1L16 & (TB1L18) # !TB1L16 & TB1L11) # !TB1_mST[3] & (TB1L16);


--TB1L21 is I2S_LCM_Config:u1|I2S_Controller:u0|always1~2
TB1L21 = !D1_mI2S_STR # !TB1_mST[4];


--TB1L9 is I2S_LCM_Config:u1|I2S_Controller:u0|LessThan~324
TB1L9 = !TB1L8 # !TB1_mST[4];


--TB1L81 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[0]~119
TB1L81 = TB1L9 & (TB1_mST[0] $ VCC) # !TB1L9 & TB1_mST[0] & VCC;

--TB1L82 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[0]~120
TB1L82 = CARRY(TB1L9 & TB1_mST[0]);


--TB1L84 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[1]~121
TB1L84 = TB1_mST[1] & !TB1L82 # !TB1_mST[1] & (TB1L82 # GND);

--TB1L85 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[1]~122
TB1L85 = CARRY(!TB1L82 # !TB1_mST[1]);


--TB1L87 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[2]~123
TB1L87 = TB1_mST[2] & (TB1L85 $ GND) # !TB1_mST[2] & !TB1L85 & VCC;

--TB1L88 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[2]~124
TB1L88 = CARRY(TB1_mST[2] & !TB1L85);


--TB1L90 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[3]~125
TB1L90 = TB1_mST[3] & !TB1L88 # !TB1_mST[3] & (TB1L88 # GND);

--TB1L91 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[3]~126
TB1L91 = CARRY(!TB1L88 # !TB1_mST[3]);


--TB1L93 is I2S_LCM_Config:u1|I2S_Controller:u0|mST[4]~127
TB1L93 = TB1_mST[4] $ !TB1L91;


--div[10] is div[10]
div[10] = DFFEAS(A1L505, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--UB1L10 is I2C_AV_Config:u2|I2C_Controller:u0|ACK3~216
UB1L10 = UB1L48Q & UB1L63Q & (UB1L44 # UB1L64);


--UB1L11 is I2C_AV_Config:u2|I2C_Controller:u0|ACK3~217
UB1L11 = UB1L10 & (A1L251 & !UB1L60Q) # !UB1L10 & UB1_ACK3;


--UB1L85 is I2C_AV_Config:u2|I2C_Controller:u0|Select~1303
UB1L85 = UB1L48Q & (A1L251 & !UB1L54Q) # !UB1L48Q & UB1_ACK1;


--UB1L2 is I2C_AV_Config:u2|I2C_Controller:u0|ACK1~170
UB1L2 = UB1L60Q & UB1L63Q & (UB1L54Q $ !UB1L57Q);


--UB1L3 is I2C_AV_Config:u2|I2C_Controller:u0|ACK1~171
UB1L3 = UB1L51Q & (UB1L2 & UB1L85 # !UB1L2 & (UB1_ACK1)) # !UB1L51Q & (UB1_ACK1);


--UB1L5 is I2C_AV_Config:u2|I2C_Controller:u0|ACK2~235
UB1L5 = UB1L60Q & (!UB1L54Q # !UB1L48Q) # !UB1L60Q & (UB1L48Q # UB1L54Q) # !UB1L63Q;


--UB1L6 is I2C_AV_Config:u2|I2C_Controller:u0|ACK2~236
UB1L6 = UB1_ACK2 & (UB1L5 # !UB1L51Q # !UB1L57Q);


--UB1L7 is I2C_AV_Config:u2|I2C_Controller:u0|ACK2~237
UB1L7 = UB1L57Q & UB1L51Q & A1L251 & !UB1L60Q;


--UB1L45 is I2C_AV_Config:u2|I2C_Controller:u0|SD[22]~696
UB1L45 = UB1L63Q & !UB1L48Q;


--UB1L8 is I2C_AV_Config:u2|I2C_Controller:u0|ACK2~238
UB1L8 = UB1L6 # UB1L7 & UB1L45 & !UB1L54Q;


--E1L49 is I2C_AV_Config:u2|Select~137
E1L49 = !E1_mSetup_ST.0010 & (UB1_END # E1L124 # !E1_mSetup_ST.0001);


--EB1_status_out[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[1]
EB1_status_out[1] = AMPP_FUNCTION(div[13], EB1L5, !B1_reset_all);


--DB1_buffer_write_enable is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|buffer_write_enable
DB1_buffer_write_enable = AMPP_FUNCTION(div[13], DB1L6, !B1_reset_all);


--Q1L4 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|trigger_write_addr_latch_ena~50
Q1L4 = AMPP_FUNCTION(EB1_status_out[1], DB1_buffer_write_enable, S1_dffs[5]);


--C1L33 is sld_hub:sld_hub_inst|IRSR_D[1]~414
C1L33 = AMPP_FUNCTION(PB3_Q[2], Q1L4, RB1_state[4]);


--PB4_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]
PB4_Q[1] = AMPP_FUNCTION(A1L464, C1L24, C1_CLRN_SIGNAL, C1L31);


--NB1_safe_q[12] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[12]
NB1_safe_q[12] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita12, !B1_reset_all, P1L1);


--NB1_safe_q[11] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[11]
NB1_safe_q[11] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita11, !B1_reset_all, P1L1);


--NB1_safe_q[10] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[10]
NB1_safe_q[10] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita10, !B1_reset_all, P1L1);


--NB1_safe_q[9] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[9]
NB1_safe_q[9] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita9, !B1_reset_all, P1L1);


--NB1_safe_q[8] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[8]
NB1_safe_q[8] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita8, !B1_reset_all, P1L1);


--NB1_safe_q[7] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[7]
NB1_safe_q[7] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita7, !B1_reset_all, P1L1);


--NB1_safe_q[6] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[6]
NB1_safe_q[6] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita6, !B1_reset_all, P1L1);


--NB1_safe_q[5] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[5]
NB1_safe_q[5] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita5, !B1_reset_all, P1L1);


--NB1_safe_q[4] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[4]
NB1_safe_q[4] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita4, !B1_reset_all, P1L1);


--NB1_safe_q[3] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[3]
NB1_safe_q[3] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita3, !B1_reset_all, P1L1);


--NB1_safe_q[2] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[2]
NB1_safe_q[2] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita2, !B1_reset_all, P1L1);


--NB1_safe_q[1] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[1]
NB1_safe_q[1] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita1, !B1_reset_all, P1L1);


--NB1_safe_q[0] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|safe_q[0]
NB1_safe_q[0] = AMPP_FUNCTION(div[13], NB1_counter_comb_bita0, !B1_reset_all, P1L1);


--NB1_counter_comb_bita0 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita0
NB1_counter_comb_bita0 = AMPP_FUNCTION(NB1_safe_q[0], GND);

--NB1L2 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita0~COUT
NB1L2 = AMPP_FUNCTION(NB1_safe_q[0]);


--NB1_counter_comb_bita1 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita1
NB1_counter_comb_bita1 = AMPP_FUNCTION(NB1_safe_q[1], GND, NB1L2);

--NB1L4 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita1~COUT
NB1L4 = AMPP_FUNCTION(NB1_safe_q[1], NB1L2);


--NB1_counter_comb_bita2 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita2
NB1_counter_comb_bita2 = AMPP_FUNCTION(NB1_safe_q[2], GND, NB1L4);

--NB1L6 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita2~COUT
NB1L6 = AMPP_FUNCTION(NB1_safe_q[2], NB1L4);


--NB1_counter_comb_bita3 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita3
NB1_counter_comb_bita3 = AMPP_FUNCTION(NB1_safe_q[3], GND, NB1L6);

--NB1L8 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita3~COUT
NB1L8 = AMPP_FUNCTION(NB1_safe_q[3], NB1L6);


--NB1_counter_comb_bita4 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita4
NB1_counter_comb_bita4 = AMPP_FUNCTION(NB1_safe_q[4], GND, NB1L8);

--NB1L10 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita4~COUT
NB1L10 = AMPP_FUNCTION(NB1_safe_q[4], NB1L8);


--NB1_counter_comb_bita5 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita5
NB1_counter_comb_bita5 = AMPP_FUNCTION(NB1_safe_q[5], GND, NB1L10);

--NB1L12 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita5~COUT
NB1L12 = AMPP_FUNCTION(NB1_safe_q[5], NB1L10);


--NB1_counter_comb_bita6 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita6
NB1_counter_comb_bita6 = AMPP_FUNCTION(NB1_safe_q[6], GND, NB1L12);

--NB1L14 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita6~COUT
NB1L14 = AMPP_FUNCTION(NB1_safe_q[6], NB1L12);


--NB1_counter_comb_bita7 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita7
NB1_counter_comb_bita7 = AMPP_FUNCTION(NB1_safe_q[7], GND, NB1L14);

--NB1L16 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita7~COUT
NB1L16 = AMPP_FUNCTION(NB1_safe_q[7], NB1L14);


--NB1_counter_comb_bita8 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita8
NB1_counter_comb_bita8 = AMPP_FUNCTION(NB1_safe_q[8], GND, NB1L16);

--NB1L18 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita8~COUT
NB1L18 = AMPP_FUNCTION(NB1_safe_q[8], NB1L16);


--NB1_counter_comb_bita9 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita9
NB1_counter_comb_bita9 = AMPP_FUNCTION(NB1_safe_q[9], GND, NB1L18);

--NB1L20 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita9~COUT
NB1L20 = AMPP_FUNCTION(NB1_safe_q[9], NB1L18);


--NB1_counter_comb_bita10 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita10
NB1_counter_comb_bita10 = AMPP_FUNCTION(NB1_safe_q[10], GND, NB1L20);

--NB1L22 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita10~COUT
NB1L22 = AMPP_FUNCTION(NB1_safe_q[10], NB1L20);


--NB1_counter_comb_bita11 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita11
NB1_counter_comb_bita11 = AMPP_FUNCTION(NB1_safe_q[11], GND, NB1L22);

--NB1L24 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita11~COUT
NB1L24 = AMPP_FUNCTION(NB1_safe_q[11], NB1L22);


--NB1_counter_comb_bita12 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita12
NB1_counter_comb_bita12 = AMPP_FUNCTION(NB1_safe_q[12], GND, NB1L24);

--NB1L28 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita12~COUT
NB1L28 = AMPP_FUNCTION(NB1_safe_q[12], NB1L24);


--NB1L26 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_2qd:auto_generated|counter_comb_bita12~16
NB1L26 = AMPP_FUNCTION(NB1L28);


--EB1L5 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113
EB1L5 = AMPP_FUNCTION(PB4_Q[1], NB1L26, Q1_is_max_write_address_ff);


--CB1_trigger_happened_ff[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened_ff[0]
CB1_trigger_happened_ff[0] = AMPP_FUNCTION(div[13], CB1L3, PB4_Q[1]);


--GB1_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff
GB1_regoutff = AMPP_FUNCTION(div[13], GB1L3);


--GB36_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff
GB36_regoutff = AMPP_FUNCTION(div[13], GB36L3);


--GB35_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff
GB35_regoutff = AMPP_FUNCTION(div[13], GB35L3);


--CB1L6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~456
CB1L6 = AMPP_FUNCTION(CB1_trigger_happened_ff[0], GB1_regoutff, GB36_regoutff, GB35_regoutff);


--GB34_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff
GB34_regoutff = AMPP_FUNCTION(div[13], GB34L3);


--GB33_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff
GB33_regoutff = AMPP_FUNCTION(div[13], GB33L3);


--GB32_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff
GB32_regoutff = AMPP_FUNCTION(div[13], GB32L3);


--GB31_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff
GB31_regoutff = AMPP_FUNCTION(div[13], GB31L3);


--CB1L7 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~457
CB1L7 = AMPP_FUNCTION(GB34_regoutff, GB33_regoutff, GB32_regoutff, GB31_regoutff);


--GB30_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff
GB30_regoutff = AMPP_FUNCTION(div[13], GB30L3);


--GB29_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff
GB29_regoutff = AMPP_FUNCTION(div[13], GB29L3);


--GB28_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff
GB28_regoutff = AMPP_FUNCTION(div[13], GB28L3);


--GB27_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff
GB27_regoutff = AMPP_FUNCTION(div[13], GB27L3);


--CB1L8 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~458
CB1L8 = AMPP_FUNCTION(GB30_regoutff, GB29_regoutff, GB28_regoutff, GB27_regoutff);


--GB26_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff
GB26_regoutff = AMPP_FUNCTION(div[13], GB26L3);


--GB25_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff
GB25_regoutff = AMPP_FUNCTION(div[13], GB25L3);


--GB24_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff
GB24_regoutff = AMPP_FUNCTION(div[13], GB24L3);


--GB23_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff
GB23_regoutff = AMPP_FUNCTION(div[13], GB23L3);


--CB1L9 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~459
CB1L9 = AMPP_FUNCTION(GB26_regoutff, GB25_regoutff, GB24_regoutff, GB23_regoutff);


--CB1L10 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~460
CB1L10 = AMPP_FUNCTION(CB1L6, CB1L7, CB1L8, CB1L9);


--GB22_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff
GB22_regoutff = AMPP_FUNCTION(div[13], GB22L3);


--GB21_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff
GB21_regoutff = AMPP_FUNCTION(div[13], GB21L3);


--GB20_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff
GB20_regoutff = AMPP_FUNCTION(div[13], GB20L3);


--GB19_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff
GB19_regoutff = AMPP_FUNCTION(div[13], GB19L3);


--CB1L11 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~461
CB1L11 = AMPP_FUNCTION(GB22_regoutff, GB21_regoutff, GB20_regoutff, GB19_regoutff);


--GB18_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff
GB18_regoutff = AMPP_FUNCTION(div[13], GB18L3);


--GB17_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff
GB17_regoutff = AMPP_FUNCTION(div[13], GB17L3);


--GB16_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff
GB16_regoutff = AMPP_FUNCTION(div[13], GB16L3);


--GB15_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff
GB15_regoutff = AMPP_FUNCTION(div[13], GB15L3);


--CB1L12 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~462
CB1L12 = AMPP_FUNCTION(GB18_regoutff, GB17_regoutff, GB16_regoutff, GB15_regoutff);


--GB14_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff
GB14_regoutff = AMPP_FUNCTION(div[13], GB14L3);


--GB13_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff
GB13_regoutff = AMPP_FUNCTION(div[13], GB13L3);


--GB12_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff
GB12_regoutff = AMPP_FUNCTION(div[13], GB12L3);


--GB11_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff
GB11_regoutff = AMPP_FUNCTION(div[13], GB11L3);


--CB1L13 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~463
CB1L13 = AMPP_FUNCTION(GB14_regoutff, GB13_regoutff, GB12_regoutff, GB11_regoutff);


--GB10_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff
GB10_regoutff = AMPP_FUNCTION(div[13], GB10L3);


--GB9_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff
GB9_regoutff = AMPP_FUNCTION(div[13], GB9L3);


--GB8_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff
GB8_regoutff = AMPP_FUNCTION(div[13], GB8L3);


--GB7_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff
GB7_regoutff = AMPP_FUNCTION(div[13], GB7L3);


--CB1L14 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~464
CB1L14 = AMPP_FUNCTION(GB10_regoutff, GB9_regoutff, GB8_regoutff, GB7_regoutff);


--CB1L15 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~465
CB1L15 = AMPP_FUNCTION(CB1L11, CB1L12, CB1L13, CB1L14);


--GB3_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff
GB3_regoutff = AMPP_FUNCTION(div[13], GB3L3);


--GB6_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff
GB6_regoutff = AMPP_FUNCTION(div[13], GB6L3);


--GB5_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff
GB5_regoutff = AMPP_FUNCTION(div[13], GB5L3);


--GB4_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff
GB4_regoutff = AMPP_FUNCTION(div[13], GB4L3);


--GB2_regoutff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff
GB2_regoutff = AMPP_FUNCTION(div[13], GB2L3);


--CB1L16 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~466
CB1L16 = AMPP_FUNCTION(GB6_regoutff, GB5_regoutff, GB4_regoutff, GB2_regoutff);


--CB1L17 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~467
CB1L17 = AMPP_FUNCTION(CB1L10, CB1L15, GB3_regoutff, CB1L16);


--CB1_trigger_happened_ff[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened_ff[1]
CB1_trigger_happened_ff[1] = AMPP_FUNCTION(div[13], CB1L5, PB4_Q[1]);


--S1_dffs[2] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[2]
S1_dffs[2] = AMPP_FUNCTION(A1L464, S1_dffs[3], !B1_reset_all, P1_trigger_setup_ena);


--CB1L18 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~468
CB1L18 = AMPP_FUNCTION(CB1_trigger_happened_ff[0], S1_dffs[2]);


--CB1L19 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened~469
CB1L19 = AMPP_FUNCTION(CB1L17, CB1_trigger_happened_ff[1], CB1L18, S1_dffs[5]);


--EB1L6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~114
EB1L6 = AMPP_FUNCTION(EB1L5, EB1_status_out[0], CB1L19);


--div[13] is div[13]
div[13] = DFFEAS(A1L514, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--S1_dffs[3] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[3]
S1_dffs[3] = AMPP_FUNCTION(A1L464, S1_dffs[4], !B1_reset_all, P1_trigger_setup_ena);


--S1_dffs[4] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[4]
S1_dffs[4] = AMPP_FUNCTION(A1L464, S1_dffs[5], !B1_reset_all, P1_trigger_setup_ena);


--HB1_pre_hazard[10] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[10]
HB1_pre_hazard[10] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita10, !B1_reset_all, DB1_post_trigger_count_enable);


--DB1_edq is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq
DB1_edq = AMPP_FUNCTION(div[13], DB1L4, !B1_reset_all);


--DB1L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~88
DB1L3 = AMPP_FUNCTION(S1_dffs[3], S1_dffs[4], HB1_pre_hazard[10], DB1_edq);


--HB1_pre_hazard[12] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[12]
HB1_pre_hazard[12] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita12, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[11] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[11]
HB1_pre_hazard[11] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita11, !B1_reset_all, DB1_post_trigger_count_enable);


--AB1L1 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|stop_acquisition~124
AB1L1 = AMPP_FUNCTION(HB1_pre_hazard[12], HB1_pre_hazard[10], HB1_pre_hazard[11], S1_dffs[3]);


--DB1L6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~35
DB1L6 = AMPP_FUNCTION(PB4_Q[1], DB1L3, S1_dffs[4], AB1L1);


--DB1L7 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~36
DB1L7 = AMPP_FUNCTION(Q1_is_max_write_address_ff, CB1L19, DB1L6);


--S1_dffs[6] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[6]
S1_dffs[6] = AMPP_FUNCTION(A1L464, S1_dffs[7], !B1_reset_all, P1_trigger_setup_ena);


--RB1_state[1] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[1]
RB1_state[1] = AMPP_FUNCTION(A1L464, RB1L18, A1L466);


--PB1_Q[0] is sld_hub:sld_hub_inst|sld_dffex:RESET|Q[0]
PB1_Q[0] = AMPP_FUNCTION(A1L464, PB1L3, C1_jtag_debug_mode_usr1);


--C1L4 is sld_hub:sld_hub_inst|CLRN_SIGNAL~0
C1L4 = AMPP_FUNCTION(RB1_state[1], PB1_Q[0]);


--C1L37 is sld_hub:sld_hub_inst|IRSR_D[3]~415
C1L37 = AMPP_FUNCTION(PB3_Q[4], RB1_state[4], CB1_trigger_happened_ff[0], CB1L19);


--PB3L13 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[7]~210
PB3L13 = AMPP_FUNCTION(altera_internal_jtag, C1L29, PB3_Q[7], PB3L4);


--SB1_w_anode38w[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|w_anode38w[3]
SB1_w_anode38w[3] = AMPP_FUNCTION(PB3_Q[1], PB3_Q[2], C1L44, PB3_Q[3]);


--C1L49 is sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q~52
C1L49 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, C1_OK_TO_UPDATE_IR_Q, RB1_state[4], RB1_state[8]);


--SB1_dffe1a[1] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[1]
SB1_dffe1a[1] = AMPP_FUNCTION(A1L464, SB1_w_anode18w[3], C1_CLRN_SIGNAL, C1L6);


--C1L1 is sld_hub:sld_hub_inst|BROADCAST_ENA~28
C1L1 = AMPP_FUNCTION(RB1_state[8], C1_OK_TO_UPDATE_IR_Q, SB1_dffe1a[2], SB1_dffe1a[1]);


--PB2L3 is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~71
PB2L3 = AMPP_FUNCTION(SB1_dffe1a[1], PB2_Q[0], PB7_Q[0], C1L1);


--C1L45 is sld_hub:sld_hub_inst|jtag_debug_mode~171
C1L45 = AMPP_FUNCTION(RB1_state[12], A1L466, RB1_state[2]);


--RB1_state[15] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15]
RB1_state[15] = AMPP_FUNCTION(A1L464, RB1L30, !A1L466);


--C1L46 is sld_hub:sld_hub_inst|jtag_debug_mode~172
C1L46 = AMPP_FUNCTION(C1L44, C1_jtag_debug_mode, C1L45, RB1_state[15]);


--PB5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[0]
PB5_Q[0] = AMPP_FUNCTION(A1L464, PB3_Q[0], C1_CLRN_SIGNAL, C1L11);


--C1L23 is sld_hub:sld_hub_inst|IRF_D[1][0]~48
C1L23 = AMPP_FUNCTION(PB5_Q[0], PB3_Q[0], PB2_Q[0]);


--C1L11 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~0
C1L11 = AMPP_FUNCTION(PB6_Q[0], C1_OK_TO_UPDATE_IR_Q, RB1_state[5]);


--PB3_Q[6] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[6]
PB3_Q[6] = AMPP_FUNCTION(A1L464, C1L40, C1_CLRN_SIGNAL, PB3L5);


--C1L39 is sld_hub:sld_hub_inst|IRSR_D[5]~416
C1L39 = AMPP_FUNCTION(RB1_state[4], PB3_Q[6]);


--SB1_w_anode28w[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|w_anode28w[3]
SB1_w_anode28w[3] = AMPP_FUNCTION(PB3_Q[2], C1L44, PB3_Q[1], PB3_Q[3]);


--RB1L22 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~14
RB1L22 = AMPP_FUNCTION(A1L466, RB1_state[3], RB1_state[4]);


--C1L38 is sld_hub:sld_hub_inst|IRSR_D[4]~417
C1L38 = AMPP_FUNCTION(PB3_Q[5], CB1L19, RB1_state[4]);


--N1_WORD_SR[2] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[2]
N1_WORD_SR[2] = AMPP_FUNCTION(A1L464, N1L26, N1L16);


--N1_word_counter[3] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[3]
N1_word_counter[3] = AMPP_FUNCTION(A1L464, N1L11, N1L6);


--N1L22 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~962
N1L22 = AMPP_FUNCTION(N1_word_counter[1], N1_word_counter[2], N1_word_counter[3], N1_word_counter[0]);


--N1L23 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~963
N1L23 = AMPP_FUNCTION(N1_WORD_SR[2], N1L22, RB1_state[4], N2_clear_signal);


--N1L4 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[0]~434
N1L4 = AMPP_FUNCTION(N1_word_counter[3], N1_word_counter[2]);


--N1L5 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[0]~435
N1L5 = AMPP_FUNCTION(N1_word_counter[1], N1_word_counter[0], N1L4, N2_clear_signal);


--N1L1 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|add~111
N1L1 = AMPP_FUNCTION(N1_word_counter[1], N1_word_counter[0]);


--N1L6 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[0]~436
N1L6 = AMPP_FUNCTION(RB1_state[3], B1L79, RB1_state[4], N2_clear_signal);


--N1L10 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter~437
N1L10 = AMPP_FUNCTION(N2_clear_signal, N1_word_counter[0], N1L4, N1_word_counter[1]);


--S4_dffs[2] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[2]
S4_dffs[2] = AMPP_FUNCTION(A1L464, S4L3, !B1_reset_all);


--S4L2 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1569
S4L2 = AMPP_FUNCTION(S4_dffs[2], NB1_safe_q[0], RB1_state[4], B1L79);


--Q1L3 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff~62
Q1L3 = AMPP_FUNCTION(NB1L26, Q1_is_max_write_address_ff);


--N1L24 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~964
N1L24 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, RB1_state[8], RB1_state[4]);


--N2L30 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1214
N2L30 = AMPP_FUNCTION(N2_word_counter[3], N2_word_counter[0], N2_word_counter[4]);


--N2L31 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1215
N2L31 = AMPP_FUNCTION(N1L24, N2_word_counter[1], N2L30, N2_word_counter[2]);


--N2_WORD_SR[2] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[2]
N2_WORD_SR[2] = AMPP_FUNCTION(A1L464, N2L33, N2L23);


--N2L32 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1216
N2L32 = AMPP_FUNCTION(N2L31, RB1_state[4], N2_WORD_SR[2], N2_clear_signal);


--N2L4 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]~683
N2L4 = AMPP_FUNCTION(N2_word_counter[0], GND);

--N2L5 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]~684
N2L5 = AMPP_FUNCTION(N2_word_counter[0]);


--N2L9 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]~685
N2L9 = AMPP_FUNCTION(N2_word_counter[1], GND, N2L5);

--N2L10 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]~686
N2L10 = AMPP_FUNCTION(N2_word_counter[1], N2L5);


--N2L12 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[2]~687
N2L12 = AMPP_FUNCTION(N2_word_counter[2], GND, N2L10);

--N2L13 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[2]~688
N2L13 = AMPP_FUNCTION(N2_word_counter[2], N2L10);


--N2L15 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]~689
N2L15 = AMPP_FUNCTION(N2_word_counter[3], GND, N2L13);

--N2L16 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]~690
N2L16 = AMPP_FUNCTION(N2_word_counter[3], N2L13);


--N2L6 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]~691
N2L6 = AMPP_FUNCTION(RB1_state[4], RB1_state[3], C1_jtag_debug_mode_usr0, N2_clear_signal);


--N2L18 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[4]~692
N2L18 = AMPP_FUNCTION(N2_word_counter[4], N2L16);


--C1L10 is sld_hub:sld_hub_inst|Equal~142
C1L10 = AMPP_FUNCTION(C1L7, C1L8, S5_dffs[1], S5_dffs[0]);


--EB1_status_out[2] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2]
EB1_status_out[2] = AMPP_FUNCTION(div[13], PB4_Q[1], !B1_reset_all);


--C1L34 is sld_hub:sld_hub_inst|IRSR_D[2]~418
C1L34 = AMPP_FUNCTION(DB1_post_trigger_count_enable, DB1_edq, Q1_is_max_write_address_ff, PB4_Q[1]);


--C1L35 is sld_hub:sld_hub_inst|IRSR_D[2]~419
C1L35 = AMPP_FUNCTION(EB1_status_out[2], C1L34, S1_dffs[5]);


--C1L36 is sld_hub:sld_hub_inst|IRSR_D[2]~420
C1L36 = AMPP_FUNCTION(PB3_Q[3], C1L35, RB1_state[4]);


--RB1_state[11] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[11]
RB1_state[11] = AMPP_FUNCTION(A1L464, RB1L27, A1L466);


--RB1_state[9] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[9]
RB1_state[9] = AMPP_FUNCTION(A1L464, C1L50);


--RB1_tms_cnt[2] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[2]
RB1_tms_cnt[2] = AMPP_FUNCTION(A1L464, RB1L41, !A1L466);


--RB1_tms_cnt[0] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0]
RB1_tms_cnt[0] = AMPP_FUNCTION(A1L464, RB1L39);


--RB1_tms_cnt[1] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[1]
RB1_tms_cnt[1] = AMPP_FUNCTION(A1L464, RB1L40, !A1L466);


--RB1L31 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~435
RB1L31 = AMPP_FUNCTION(RB1_tms_cnt[2], RB1_tms_cnt[0], RB1_tms_cnt[1]);


--RB1L32 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~436
RB1L32 = AMPP_FUNCTION(A1L466, RB1_state[9], RB1L31, RB1_state[0]);


--RB1_state[10] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[10]
RB1_state[10] = AMPP_FUNCTION(A1L464, RB1L26);


--RB1L33 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~437
RB1L33 = AMPP_FUNCTION(A1L466, RB1_state[11], RB1_state[10]);


--RB1L34 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~438
RB1L34 = AMPP_FUNCTION(A1L466, RB1_state[8], RB1_state[1], RB1_state[15]);


--RB1_state[6] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[6]
RB1_state[6] = AMPP_FUNCTION(A1L464, RB1L23, A1L466);


--RB1L24 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~17
RB1L24 = AMPP_FUNCTION(A1L466, RB1_state[6]);


--E1_mI2C_DATA[2] is I2C_AV_Config:u2|mI2C_DATA[2]
E1_mI2C_DATA[2] = DFFEAS(E1_LUT_DATA[2], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[8] is I2C_AV_Config:u2|mI2C_DATA[8]
E1_mI2C_DATA[8] = DFFEAS(E1_LUT_DATA[8], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[9] is I2C_AV_Config:u2|mI2C_DATA[9]
E1_mI2C_DATA[9] = DFFEAS(E1_LUT_DATA[9], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[1] is I2C_AV_Config:u2|mI2C_DATA[1]
E1_mI2C_DATA[1] = DFFEAS(E1_LUT_DATA[1], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[7] is I2C_AV_Config:u2|mI2C_DATA[7]
E1_mI2C_DATA[7] = DFFEAS(E1_LUT_DATA[7], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[0] is I2C_AV_Config:u2|mI2C_DATA[0]
E1_mI2C_DATA[0] = DFFEAS(E1_LUT_DATA[0], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[10] is I2C_AV_Config:u2|mI2C_DATA[10]
E1_mI2C_DATA[10] = DFFEAS(E1_LUT_DATA[10], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[4] is I2C_AV_Config:u2|mI2C_DATA[4]
E1_mI2C_DATA[4] = DFFEAS(E1_LUT_DATA[4], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[11] is I2C_AV_Config:u2|mI2C_DATA[11]
E1_mI2C_DATA[11] = DFFEAS(E1_LUT_DATA[11], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[3] is I2C_AV_Config:u2|mI2C_DATA[3]
E1_mI2C_DATA[3] = DFFEAS(E1_LUT_DATA[3], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[6] is I2C_AV_Config:u2|mI2C_DATA[6]
E1_mI2C_DATA[6] = DFFEAS(E1_LUT_DATA[6], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[5] is I2C_AV_Config:u2|mI2C_DATA[5]
E1_mI2C_DATA[5] = DFFEAS(E1_LUT_DATA[5], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[22] is I2C_AV_Config:u2|mI2C_DATA[22]
E1_mI2C_DATA[22] = DFFEAS(E1L46, E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[15] is I2C_AV_Config:u2|mI2C_DATA[15]
E1_mI2C_DATA[15] = DFFEAS(E1_LUT_DATA[15], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[13] is I2C_AV_Config:u2|mI2C_DATA[13]
E1_mI2C_DATA[13] = DFFEAS(E1_LUT_DATA[13], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[14] is I2C_AV_Config:u2|mI2C_DATA[14]
E1_mI2C_DATA[14] = DFFEAS(E1_LUT_DATA[14], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--E1_mI2C_DATA[12] is I2C_AV_Config:u2|mI2C_DATA[12]
E1_mI2C_DATA[12] = DFFEAS(E1_LUT_DATA[12], E1_mI2C_CTRL_CLK,  ,  , E1L119,  ,  ,  ,  );


--K1L105Q is touch_spi:u11|mdata_in[5]~reg0
K1L105Q = DFFEAS(K1L109, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--K1L106 is touch_spi:u11|mdata_in[6]~565
K1L106 = K1_mdclk & K1L105Q # !K1_mdclk & (K1L191Q);


--TB1_mI2S_CLK_DIV[1] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[1]
TB1_mI2S_CLK_DIV[1] = DFFEAS(TB1L30, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1_mI2S_CLK_DIV[0] is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[0]
TB1_mI2S_CLK_DIV[0] = DFFEAS(TB1L27, div[2], J1_oRST_0,  ,  ,  ,  , TB1L7,  );


--TB1L27 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[0]~239
TB1L27 = TB1_mI2S_CLK_DIV[0] $ VCC;

--TB1L28 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[0]~240
TB1L28 = CARRY(TB1_mI2S_CLK_DIV[0]);


--TB1L30 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[1]~241
TB1L30 = TB1_mI2S_CLK_DIV[1] & !TB1L28 # !TB1_mI2S_CLK_DIV[1] & (TB1L28 # GND);

--TB1L31 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[1]~242
TB1L31 = CARRY(!TB1L28 # !TB1_mI2S_CLK_DIV[1]);


--TB1L33 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[2]~243
TB1L33 = TB1_mI2S_CLK_DIV[2] & (TB1L31 $ GND) # !TB1_mI2S_CLK_DIV[2] & !TB1L31 & VCC;

--TB1L34 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[2]~244
TB1L34 = CARRY(TB1_mI2S_CLK_DIV[2] & !TB1L31);


--TB1L36 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[3]~245
TB1L36 = TB1_mI2S_CLK_DIV[3] & !TB1L34 # !TB1_mI2S_CLK_DIV[3] & (TB1L34 # GND);

--TB1L37 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[3]~246
TB1L37 = CARRY(!TB1L34 # !TB1_mI2S_CLK_DIV[3]);


--TB1L39 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[4]~247
TB1L39 = TB1_mI2S_CLK_DIV[4] & (TB1L37 $ GND) # !TB1_mI2S_CLK_DIV[4] & !TB1L37 & VCC;

--TB1L40 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[4]~248
TB1L40 = CARRY(TB1_mI2S_CLK_DIV[4] & !TB1L37);


--TB1L42 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[5]~249
TB1L42 = TB1_mI2S_CLK_DIV[5] & !TB1L40 # !TB1_mI2S_CLK_DIV[5] & (TB1L40 # GND);

--TB1L43 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[5]~250
TB1L43 = CARRY(!TB1L40 # !TB1_mI2S_CLK_DIV[5]);


--TB1L45 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[6]~251
TB1L45 = TB1_mI2S_CLK_DIV[6] & (TB1L43 $ GND) # !TB1_mI2S_CLK_DIV[6] & !TB1L43 & VCC;

--TB1L46 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[6]~252
TB1L46 = CARRY(TB1_mI2S_CLK_DIV[6] & !TB1L43);


--TB1L48 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[7]~253
TB1L48 = TB1_mI2S_CLK_DIV[7] & !TB1L46 # !TB1_mI2S_CLK_DIV[7] & (TB1L46 # GND);

--TB1L49 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[7]~254
TB1L49 = CARRY(!TB1L46 # !TB1_mI2S_CLK_DIV[7]);


--TB1L51 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[8]~255
TB1L51 = TB1_mI2S_CLK_DIV[8] & (TB1L49 $ GND) # !TB1_mI2S_CLK_DIV[8] & !TB1L49 & VCC;

--TB1L52 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[8]~256
TB1L52 = CARRY(TB1_mI2S_CLK_DIV[8] & !TB1L49);


--TB1L54 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[9]~257
TB1L54 = TB1_mI2S_CLK_DIV[9] & !TB1L52 # !TB1_mI2S_CLK_DIV[9] & (TB1L52 # GND);

--TB1L55 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[9]~258
TB1L55 = CARRY(!TB1L52 # !TB1_mI2S_CLK_DIV[9]);


--TB1L57 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[10]~259
TB1L57 = TB1_mI2S_CLK_DIV[10] & (TB1L55 $ GND) # !TB1_mI2S_CLK_DIV[10] & !TB1L55 & VCC;

--TB1L58 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[10]~260
TB1L58 = CARRY(TB1_mI2S_CLK_DIV[10] & !TB1L55);


--TB1L60 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[11]~261
TB1L60 = TB1_mI2S_CLK_DIV[11] & !TB1L58 # !TB1_mI2S_CLK_DIV[11] & (TB1L58 # GND);

--TB1L61 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[11]~262
TB1L61 = CARRY(!TB1L58 # !TB1_mI2S_CLK_DIV[11]);


--TB1L63 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[12]~263
TB1L63 = TB1_mI2S_CLK_DIV[12] & (TB1L61 $ GND) # !TB1_mI2S_CLK_DIV[12] & !TB1L61 & VCC;

--TB1L64 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[12]~264
TB1L64 = CARRY(TB1_mI2S_CLK_DIV[12] & !TB1L61);


--TB1L66 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[13]~265
TB1L66 = TB1_mI2S_CLK_DIV[13] & !TB1L64 # !TB1_mI2S_CLK_DIV[13] & (TB1L64 # GND);

--TB1L67 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[13]~266
TB1L67 = CARRY(!TB1L64 # !TB1_mI2S_CLK_DIV[13]);


--TB1L69 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[14]~267
TB1L69 = TB1_mI2S_CLK_DIV[14] & (TB1L67 $ GND) # !TB1_mI2S_CLK_DIV[14] & !TB1L67 & VCC;

--TB1L70 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[14]~268
TB1L70 = CARRY(TB1_mI2S_CLK_DIV[14] & !TB1L67);


--TB1L72 is I2S_LCM_Config:u1|I2S_Controller:u0|mI2S_CLK_DIV[15]~269
TB1L72 = TB1_mI2S_CLK_DIV[15] $ TB1L70;


--div[1] is div[1]
div[1] = DFFEAS(A1L478, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[0] is div[0]
div[0] = DFFEAS(A1L475, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--A1L475 is div[0]~239
A1L475 = div[0] $ VCC;

--A1L476 is div[0]~240
A1L476 = CARRY(div[0]);


--A1L478 is div[1]~241
A1L478 = div[1] & !A1L476 # !div[1] & (A1L476 # GND);

--A1L479 is div[1]~242
A1L479 = CARRY(!A1L476 # !div[1]);


--A1L481 is div[2]~243
A1L481 = div[2] & (A1L479 $ GND) # !div[2] & !A1L479 & VCC;

--A1L482 is div[2]~244
A1L482 = CARRY(div[2] & !A1L479);


--D1_mSetup_ST.0010 is I2S_LCM_Config:u1|mSetup_ST.0010
D1_mSetup_ST.0010 = DFFEAS(D1_mSetup_ST.0001, TB1_mI2S_CLK, J1_oRST_0,  , D1L44,  ,  ,  ,  );


--D1_mSetup_ST.0011 is I2S_LCM_Config:u1|mSetup_ST.0011
D1_mSetup_ST.0011 = DFFEAS(D1L46, TB1_mI2S_CLK, J1_oRST_0,  , D1L44,  ,  ,  ,  );


--D1L45 is I2S_LCM_Config:u1|Select~211
D1L45 = D1_mI2S_STR & (!D1_mSetup_ST.0011 # !TB1L95) # !D1_mI2S_STR & D1_mSetup_ST.0010 & (!D1_mSetup_ST.0011);


--D1L25 is I2S_LCM_Config:u1|LUT_INDEX[0]~592
D1L25 = D1_LUT_INDEX[0] $ VCC;

--D1L26 is I2S_LCM_Config:u1|LUT_INDEX[0]~593
D1L26 = CARRY(D1_LUT_INDEX[0]);


--D1L28 is I2S_LCM_Config:u1|LUT_INDEX[1]~594
D1L28 = D1_LUT_INDEX[1] & !D1L26 # !D1_LUT_INDEX[1] & (D1L26 # GND);

--D1L29 is I2S_LCM_Config:u1|LUT_INDEX[1]~595
D1L29 = CARRY(!D1L26 # !D1_LUT_INDEX[1]);


--D1L31 is I2S_LCM_Config:u1|LUT_INDEX[2]~596
D1L31 = D1_LUT_INDEX[2] & (D1L29 $ GND) # !D1_LUT_INDEX[2] & !D1L29 & VCC;

--D1L32 is I2S_LCM_Config:u1|LUT_INDEX[2]~597
D1L32 = CARRY(D1_LUT_INDEX[2] & !D1L29);


--D1_mSetup_ST.0100 is I2S_LCM_Config:u1|mSetup_ST.0100
D1_mSetup_ST.0100 = DFFEAS(D1L72, TB1_mI2S_CLK, J1_oRST_0,  , D1L44,  ,  ,  ,  );


--D1L40 is I2S_LCM_Config:u1|LUT_INDEX[5]~5
D1L40 = D1L44 & D1_mSetup_ST.0100;


--D1L34 is I2S_LCM_Config:u1|LUT_INDEX[3]~598
D1L34 = D1_LUT_INDEX[3] & !D1L32 # !D1_LUT_INDEX[3] & (D1L32 # GND);

--D1L35 is I2S_LCM_Config:u1|LUT_INDEX[3]~599
D1L35 = CARRY(!D1L32 # !D1_LUT_INDEX[3]);


--D1L37 is I2S_LCM_Config:u1|LUT_INDEX[4]~600
D1L37 = D1_LUT_INDEX[4] & (D1L35 $ GND) # !D1_LUT_INDEX[4] & !D1L35 & VCC;

--D1L38 is I2S_LCM_Config:u1|LUT_INDEX[4]~601
D1L38 = CARRY(D1_LUT_INDEX[4] & !D1L35);


--D1L41 is I2S_LCM_Config:u1|LUT_INDEX[5]~602
D1L41 = D1_LUT_INDEX[5] $ D1L38;


--J1L79 is Reset_Delay:u9|oRST_2~15
J1L79 = J1_oRST_2 # J1L74 & J1_Cont[21];


--D1L20 is I2S_LCM_Config:u1|LUT_DATA~452
D1L20 = D1_LUT_INDEX[4] & !D1_LUT_INDEX[1] & !D1_LUT_INDEX[2] & !D1_LUT_INDEX[3];


--D1L16 is I2S_LCM_Config:u1|LUT_DATA[6]~453
D1L16 = D1_LUT_INDEX[1] & (D1_LUT_INDEX[2] # !D1_LUT_INDEX[3] # !D1_LUT_INDEX[0]) # !D1_LUT_INDEX[1] & (D1_LUT_INDEX[0] $ D1_LUT_INDEX[2]);


--D1L17 is I2S_LCM_Config:u1|LUT_DATA[6]~454
D1L17 = D1L20 # D1L16 & !D1_LUT_INDEX[4];


--D1L50 is I2S_LCM_Config:u1|mI2S_DATA[0]~752
D1L50 = J1_oRST_0 & D1L44 & D1_mSetup_ST.0010;


--D1L14 is I2S_LCM_Config:u1|LUT_DATA[5]~455
D1L14 = D1_LUT_INDEX[0] & (D1_LUT_INDEX[2] $ !D1_LUT_INDEX[3] # !D1_LUT_INDEX[1]) # !D1_LUT_INDEX[0] & (D1_LUT_INDEX[3] & (D1_LUT_INDEX[2]) # !D1_LUT_INDEX[3] & D1_LUT_INDEX[1]);


--D1L15 is I2S_LCM_Config:u1|LUT_DATA[5]~456
D1L15 = D1L20 # D1L14 & !D1_LUT_INDEX[4];


--D1L18 is I2S_LCM_Config:u1|LUT_DATA[7]~457
D1L18 = D1_LUT_INDEX[0] & D1_LUT_INDEX[2] & (D1_LUT_INDEX[1] # D1_LUT_INDEX[3]) # !D1_LUT_INDEX[0] & (D1_LUT_INDEX[1] $ (D1_LUT_INDEX[2] & !D1_LUT_INDEX[3]));


--D1L19 is I2S_LCM_Config:u1|LUT_DATA[7]~458
D1L19 = D1L20 # D1L18 & !D1_LUT_INDEX[4];


--D1L12 is I2S_LCM_Config:u1|LUT_DATA[4]~459
D1L12 = D1_LUT_INDEX[0] & D1_LUT_INDEX[3] & (D1_LUT_INDEX[1] # !D1_LUT_INDEX[2]) # !D1_LUT_INDEX[0] & (D1_LUT_INDEX[1] $ (!D1_LUT_INDEX[2] & D1_LUT_INDEX[3]));


--D1L13 is I2S_LCM_Config:u1|LUT_DATA[4]~460
D1L13 = D1L20 # D1L12 & !D1_LUT_INDEX[4];


--D1L73 is I2S_LCM_Config:u1|reduce_or~240
D1L73 = D1_LUT_INDEX[2] # D1_LUT_INDEX[3] # D1_LUT_INDEX[0] & D1_LUT_INDEX[1];


--D1L74 is I2S_LCM_Config:u1|reduce_or~241
D1L74 = !D1L73 # !D1_LUT_INDEX[4];


--D1L75 is I2S_LCM_Config:u1|reduce_or~242
D1L75 = D1_LUT_INDEX[4] & (D1_LUT_INDEX[1] # D1_LUT_INDEX[2] # D1_LUT_INDEX[3]);


--D1L76 is I2S_LCM_Config:u1|reduce_or~243
D1L76 = D1_LUT_INDEX[0] & D1L20 # !D1_LUT_INDEX[0] & (!D1L75);


--D1L3 is I2S_LCM_Config:u1|LUT_DATA[0]~461
D1L3 = !D1_LUT_INDEX[2] & !D1_LUT_INDEX[3] & (D1_LUT_INDEX[0] $ D1_LUT_INDEX[1]);


--D1L77 is I2S_LCM_Config:u1|reduce_or~244
D1L77 = D1_LUT_INDEX[4] & D1L3 # !D1_LUT_INDEX[4] & (D1_LUT_INDEX[0] $ D1_LUT_INDEX[1]);


--D1L78 is I2S_LCM_Config:u1|reduce_or~245
D1L78 = D1_LUT_INDEX[3] $ (D1_LUT_INDEX[0] & D1_LUT_INDEX[1] & D1_LUT_INDEX[2]);


--D1L21 is I2S_LCM_Config:u1|LUT_DATA~462
D1L21 = D1_LUT_INDEX[0] & D1_LUT_INDEX[1] & D1_LUT_INDEX[2] & D1_LUT_INDEX[3];


--D1L79 is I2S_LCM_Config:u1|reduce_or~246
D1L79 = !D1_LUT_INDEX[4] & !D1L21;


--D1L22 is I2S_LCM_Config:u1|LUT_DATA~463
D1L22 = D1L21 & (D1L20 & !D1_LUT_INDEX[0] # !D1_LUT_INDEX[4]) # !D1L21 & D1L20 & (!D1_LUT_INDEX[0]);


--D1L80 is I2S_LCM_Config:u1|reduce_or~247
D1L80 = !D1_LUT_INDEX[4] & (D1_LUT_INDEX[2] $ (D1_LUT_INDEX[0] & D1_LUT_INDEX[1]));


--D1L6 is I2S_LCM_Config:u1|LUT_DATA[1]~464
D1L6 = D1_LUT_INDEX[3] & !D1_LUT_INDEX[1] & (D1_LUT_INDEX[0] $ !D1_LUT_INDEX[2]) # !D1_LUT_INDEX[3] & (D1_LUT_INDEX[0] & (!D1_LUT_INDEX[2]) # !D1_LUT_INDEX[0] & D1_LUT_INDEX[1]);


--D1L7 is I2S_LCM_Config:u1|LUT_DATA[1]~465
D1L7 = D1_LUT_INDEX[4] & D1L3 # !D1_LUT_INDEX[4] & (D1L6);


--D1L8 is I2S_LCM_Config:u1|LUT_DATA[2]~466
D1L8 = D1_LUT_INDEX[2] & (D1_LUT_INDEX[1] $ (!D1_LUT_INDEX[3] # !D1_LUT_INDEX[0])) # !D1_LUT_INDEX[2] & (D1_LUT_INDEX[0] # D1_LUT_INDEX[1] & D1_LUT_INDEX[3]);


--D1L9 is I2S_LCM_Config:u1|LUT_DATA[2]~467
D1L9 = D1_LUT_INDEX[4] & D1L3 # !D1_LUT_INDEX[4] & (!D1L8);


--D1L10 is I2S_LCM_Config:u1|LUT_DATA[3]~468
D1L10 = D1_LUT_INDEX[3] $ (D1_LUT_INDEX[0] & (D1_LUT_INDEX[1] # !D1_LUT_INDEX[2]) # !D1_LUT_INDEX[0] & (D1_LUT_INDEX[1] $ D1_LUT_INDEX[2]));


--D1L11 is I2S_LCM_Config:u1|LUT_DATA[3]~469
D1L11 = D1_LUT_INDEX[0] & (D1L20 # D1L10 & !D1_LUT_INDEX[4]) # !D1_LUT_INDEX[0] & (D1L10 & !D1_LUT_INDEX[4]);


--D1L4 is I2S_LCM_Config:u1|LUT_DATA[0]~470
D1L4 = D1_LUT_INDEX[3] & (D1_LUT_INDEX[2]) # !D1_LUT_INDEX[3] & (D1_LUT_INDEX[0] $ (!D1_LUT_INDEX[1] & D1_LUT_INDEX[2]));


--D1L5 is I2S_LCM_Config:u1|LUT_DATA[0]~471
D1L5 = D1_LUT_INDEX[4] & D1L3 # !D1_LUT_INDEX[4] & (!D1L4);


--div[9] is div[9]
div[9] = DFFEAS(A1L502, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[8] is div[8]
div[8] = DFFEAS(A1L499, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[7] is div[7]
div[7] = DFFEAS(A1L496, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[6] is div[6]
div[6] = DFFEAS(A1L493, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[5] is div[5]
div[5] = DFFEAS(A1L490, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[4] is div[4]
div[4] = DFFEAS(A1L487, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[3] is div[3]
div[3] = DFFEAS(A1L484, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--A1L484 is div[3]~245
A1L484 = div[3] & !A1L482 # !div[3] & (A1L482 # GND);

--A1L485 is div[3]~246
A1L485 = CARRY(!A1L482 # !div[3]);


--A1L487 is div[4]~247
A1L487 = div[4] & (A1L485 $ GND) # !div[4] & !A1L485 & VCC;

--A1L488 is div[4]~248
A1L488 = CARRY(div[4] & !A1L485);


--A1L490 is div[5]~249
A1L490 = div[5] & !A1L488 # !div[5] & (A1L488 # GND);

--A1L491 is div[5]~250
A1L491 = CARRY(!A1L488 # !div[5]);


--A1L493 is div[6]~251
A1L493 = div[6] & (A1L491 $ GND) # !div[6] & !A1L491 & VCC;

--A1L494 is div[6]~252
A1L494 = CARRY(div[6] & !A1L491);


--A1L496 is div[7]~253
A1L496 = div[7] & !A1L494 # !div[7] & (A1L494 # GND);

--A1L497 is div[7]~254
A1L497 = CARRY(!A1L494 # !div[7]);


--A1L499 is div[8]~255
A1L499 = div[8] & (A1L497 $ GND) # !div[8] & !A1L497 & VCC;

--A1L500 is div[8]~256
A1L500 = CARRY(div[8] & !A1L497);


--A1L502 is div[9]~257
A1L502 = div[9] & !A1L500 # !div[9] & (A1L500 # GND);

--A1L503 is div[9]~258
A1L503 = CARRY(!A1L500 # !div[9]);


--A1L505 is div[10]~259
A1L505 = div[10] & (A1L503 $ GND) # !div[10] & !A1L503 & VCC;

--A1L506 is div[10]~260
A1L506 = CARRY(div[10] & !A1L503);


--PB5_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[1]
PB5_Q[1] = AMPP_FUNCTION(A1L464, PB3_Q[1], C1_CLRN_SIGNAL, C1L11);


--C1L24 is sld_hub:sld_hub_inst|IRF_D[1][1]~49
C1L24 = AMPP_FUNCTION(PB5_Q[1], PB3_Q[1], PB2_Q[0]);


--Q1L1 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_buffer_wrapped~0
Q1L1 = AMPP_FUNCTION(NB1L26, Q1_is_max_write_address_ff);


--BB1_segment_write_addr_adv_ena is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena
BB1_segment_write_addr_adv_ena = AMPP_FUNCTION(div[13], BB1L2, !B1_reset_all);


--P1L1 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|buffer_write_addr_adv_ena_int~54
P1L1 = AMPP_FUNCTION(Q1L1, BB1_segment_write_addr_adv_ena, DB1_buffer_write_enable, S1_dffs[5]);


--CB1L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened_ff[0]~91
CB1L3 = AMPP_FUNCTION(S1_dffs[5], Q1_is_max_write_address_ff, CB1_trigger_happened_ff[0]);


--S2_dffs[105] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[105]
S2_dffs[105] = AMPP_FUNCTION(A1L464, S2_dffs[106], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[106] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[106]
S2_dffs[106] = AMPP_FUNCTION(A1L464, S2_dffs[107], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[35] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[35]
B1_acq_trigger_in_reg[35] = AMPP_FUNCTION(div[13], K1_oY_COORD[9]);


--GB1_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff
GB1_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[35]);


--S2_dffs[107] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[107]
S2_dffs[107] = AMPP_FUNCTION(A1L464, altera_internal_jtag, !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[0]
S2_dffs[0] = AMPP_FUNCTION(A1L464, S2_dffs[1], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[1]
S2_dffs[1] = AMPP_FUNCTION(A1L464, S2_dffs[2], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[0] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[0]
B1_acq_trigger_in_reg[0] = AMPP_FUNCTION(div[13], TCH_BUSY);


--GB36_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff
GB36_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[0]);


--S2_dffs[2] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[2]
S2_dffs[2] = AMPP_FUNCTION(A1L464, S2_dffs[3], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[3] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[3]
S2_dffs[3] = AMPP_FUNCTION(A1L464, S2_dffs[4], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[4] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[4]
S2_dffs[4] = AMPP_FUNCTION(A1L464, S2_dffs[5], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[1] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[1]
B1_acq_trigger_in_reg[1] = AMPP_FUNCTION(div[13], TCH_DOUT);


--GB35_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff
GB35_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[1]);


--S2_dffs[5] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[5]
S2_dffs[5] = AMPP_FUNCTION(A1L464, S2_dffs[6], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[6] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[6]
S2_dffs[6] = AMPP_FUNCTION(A1L464, S2_dffs[7], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[7] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[7]
S2_dffs[7] = AMPP_FUNCTION(A1L464, S2_dffs[8], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[2] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[2]
B1_acq_trigger_in_reg[2] = AMPP_FUNCTION(div[13], TCH_PENIRQ);


--GB34_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff
GB34_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[2]);


--S2_dffs[8] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[8]
S2_dffs[8] = AMPP_FUNCTION(A1L464, S2_dffs[9], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[9] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[9]
S2_dffs[9] = AMPP_FUNCTION(A1L464, S2_dffs[10], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[10] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[10]
S2_dffs[10] = AMPP_FUNCTION(A1L464, S2_dffs[11], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[3] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[3]
B1_acq_trigger_in_reg[3] = AMPP_FUNCTION(div[13], K1_irq_cnt[0]);


--GB33_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff
GB33_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[3]);


--S2_dffs[11] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[11]
S2_dffs[11] = AMPP_FUNCTION(A1L464, S2_dffs[12], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[12] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[12]
S2_dffs[12] = AMPP_FUNCTION(A1L464, S2_dffs[13], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[13] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[13]
S2_dffs[13] = AMPP_FUNCTION(A1L464, S2_dffs[14], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[4] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[4]
B1_acq_trigger_in_reg[4] = AMPP_FUNCTION(div[13], K1_irq_cnt[1]);


--GB32_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff
GB32_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[4]);


--S2_dffs[14] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[14]
S2_dffs[14] = AMPP_FUNCTION(A1L464, S2_dffs[15], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[15] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[15]
S2_dffs[15] = AMPP_FUNCTION(A1L464, S2_dffs[16], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[16] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[16]
S2_dffs[16] = AMPP_FUNCTION(A1L464, S2_dffs[17], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[5] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[5]
B1_acq_trigger_in_reg[5] = AMPP_FUNCTION(div[13], K1_irq_cnt[2]);


--GB31_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff
GB31_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[5]);


--S2_dffs[17] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[17]
S2_dffs[17] = AMPP_FUNCTION(A1L464, S2_dffs[18], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[18] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[18]
S2_dffs[18] = AMPP_FUNCTION(A1L464, S2_dffs[19], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[19] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[19]
S2_dffs[19] = AMPP_FUNCTION(A1L464, S2_dffs[20], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[6] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[6]
B1_acq_trigger_in_reg[6] = AMPP_FUNCTION(div[13], K1_irq_cnt[3]);


--GB30_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff
GB30_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[6]);


--S2_dffs[20] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[20]
S2_dffs[20] = AMPP_FUNCTION(A1L464, S2_dffs[21], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[21] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[21]
S2_dffs[21] = AMPP_FUNCTION(A1L464, S2_dffs[22], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[22] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[22]
S2_dffs[22] = AMPP_FUNCTION(A1L464, S2_dffs[23], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[7] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[7]
B1_acq_trigger_in_reg[7] = AMPP_FUNCTION(div[13], K1_irq_cnt[4]);


--GB29_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff
GB29_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[7]);


--S2_dffs[23] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[23]
S2_dffs[23] = AMPP_FUNCTION(A1L464, S2_dffs[24], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[24] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[24]
S2_dffs[24] = AMPP_FUNCTION(A1L464, S2_dffs[25], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[25] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[25]
S2_dffs[25] = AMPP_FUNCTION(A1L464, S2_dffs[26], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[8] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[8]
B1_acq_trigger_in_reg[8] = AMPP_FUNCTION(div[13], K1_irq_cnt[5]);


--GB28_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff
GB28_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[8]);


--S2_dffs[26] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[26]
S2_dffs[26] = AMPP_FUNCTION(A1L464, S2_dffs[27], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[27] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[27]
S2_dffs[27] = AMPP_FUNCTION(A1L464, S2_dffs[28], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[28] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[28]
S2_dffs[28] = AMPP_FUNCTION(A1L464, S2_dffs[29], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[9] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[9]
B1_acq_trigger_in_reg[9] = AMPP_FUNCTION(div[13], K1_mdclk);


--GB27_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff
GB27_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[9]);


--S2_dffs[29] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[29]
S2_dffs[29] = AMPP_FUNCTION(A1L464, S2_dffs[30], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[30] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[30]
S2_dffs[30] = AMPP_FUNCTION(A1L464, S2_dffs[31], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[31] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[31]
S2_dffs[31] = AMPP_FUNCTION(A1L464, S2_dffs[32], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[10] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[10]
B1_acq_trigger_in_reg[10] = AMPP_FUNCTION(div[13], B1L50);


--GB26_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff
GB26_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[10]);


--S2_dffs[32] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[32]
S2_dffs[32] = AMPP_FUNCTION(A1L464, S2_dffs[33], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[33] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[33]
S2_dffs[33] = AMPP_FUNCTION(A1L464, S2_dffs[34], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[34] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[34]
S2_dffs[34] = AMPP_FUNCTION(A1L464, S2_dffs[35], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[11] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[11]
B1_acq_trigger_in_reg[11] = AMPP_FUNCTION(div[13], K1_oADC_DIN);


--GB25_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff
GB25_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[11]);


--S2_dffs[35] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[35]
S2_dffs[35] = AMPP_FUNCTION(A1L464, S2_dffs[36], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[36] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[36]
S2_dffs[36] = AMPP_FUNCTION(A1L464, S2_dffs[37], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[37] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[37]
S2_dffs[37] = AMPP_FUNCTION(A1L464, S2_dffs[38], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[12] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[12]
B1_acq_trigger_in_reg[12] = AMPP_FUNCTION(div[13], K1_oX_COORD[0]);


--GB24_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff
GB24_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[12]);


--S2_dffs[38] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[38]
S2_dffs[38] = AMPP_FUNCTION(A1L464, S2_dffs[39], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[39] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[39]
S2_dffs[39] = AMPP_FUNCTION(A1L464, S2_dffs[40], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[40] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[40]
S2_dffs[40] = AMPP_FUNCTION(A1L464, S2_dffs[41], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[13] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[13]
B1_acq_trigger_in_reg[13] = AMPP_FUNCTION(div[13], K1_oX_COORD[10]);


--GB23_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff
GB23_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[13]);


--S2_dffs[41] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[41]
S2_dffs[41] = AMPP_FUNCTION(A1L464, S2_dffs[42], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[42] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[42]
S2_dffs[42] = AMPP_FUNCTION(A1L464, S2_dffs[43], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[43] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[43]
S2_dffs[43] = AMPP_FUNCTION(A1L464, S2_dffs[44], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[14] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[14]
B1_acq_trigger_in_reg[14] = AMPP_FUNCTION(div[13], K1_oX_COORD[11]);


--GB22_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff
GB22_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[14]);


--S2_dffs[44] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[44]
S2_dffs[44] = AMPP_FUNCTION(A1L464, S2_dffs[45], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[45] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[45]
S2_dffs[45] = AMPP_FUNCTION(A1L464, S2_dffs[46], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[46] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[46]
S2_dffs[46] = AMPP_FUNCTION(A1L464, S2_dffs[47], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[15] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[15]
B1_acq_trigger_in_reg[15] = AMPP_FUNCTION(div[13], K1_oX_COORD[1]);


--GB21_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff
GB21_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[15]);


--S2_dffs[47] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[47]
S2_dffs[47] = AMPP_FUNCTION(A1L464, S2_dffs[48], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[48] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[48]
S2_dffs[48] = AMPP_FUNCTION(A1L464, S2_dffs[49], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[49] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[49]
S2_dffs[49] = AMPP_FUNCTION(A1L464, S2_dffs[50], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[16] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[16]
B1_acq_trigger_in_reg[16] = AMPP_FUNCTION(div[13], K1_oX_COORD[2]);


--GB20_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff
GB20_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[16]);


--S2_dffs[50] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[50]
S2_dffs[50] = AMPP_FUNCTION(A1L464, S2_dffs[51], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[51] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[51]
S2_dffs[51] = AMPP_FUNCTION(A1L464, S2_dffs[52], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[52] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[52]
S2_dffs[52] = AMPP_FUNCTION(A1L464, S2_dffs[53], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[17] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[17]
B1_acq_trigger_in_reg[17] = AMPP_FUNCTION(div[13], K1_oX_COORD[3]);


--GB19_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff
GB19_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[17]);


--S2_dffs[53] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[53]
S2_dffs[53] = AMPP_FUNCTION(A1L464, S2_dffs[54], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[54] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[54]
S2_dffs[54] = AMPP_FUNCTION(A1L464, S2_dffs[55], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[55] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[55]
S2_dffs[55] = AMPP_FUNCTION(A1L464, S2_dffs[56], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[18] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[18]
B1_acq_trigger_in_reg[18] = AMPP_FUNCTION(div[13], K1_oX_COORD[4]);


--GB18_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff
GB18_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[18]);


--S2_dffs[56] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[56]
S2_dffs[56] = AMPP_FUNCTION(A1L464, S2_dffs[57], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[57] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[57]
S2_dffs[57] = AMPP_FUNCTION(A1L464, S2_dffs[58], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[58] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[58]
S2_dffs[58] = AMPP_FUNCTION(A1L464, S2_dffs[59], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[19] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[19]
B1_acq_trigger_in_reg[19] = AMPP_FUNCTION(div[13], K1_oX_COORD[5]);


--GB17_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff
GB17_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[19]);


--S2_dffs[59] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[59]
S2_dffs[59] = AMPP_FUNCTION(A1L464, S2_dffs[60], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[60] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[60]
S2_dffs[60] = AMPP_FUNCTION(A1L464, S2_dffs[61], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[61] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[61]
S2_dffs[61] = AMPP_FUNCTION(A1L464, S2_dffs[62], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[20] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[20]
B1_acq_trigger_in_reg[20] = AMPP_FUNCTION(div[13], K1_oX_COORD[6]);


--GB16_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff
GB16_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[20]);


--S2_dffs[62] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[62]
S2_dffs[62] = AMPP_FUNCTION(A1L464, S2_dffs[63], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[63] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[63]
S2_dffs[63] = AMPP_FUNCTION(A1L464, S2_dffs[64], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[64] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[64]
S2_dffs[64] = AMPP_FUNCTION(A1L464, S2_dffs[65], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[21] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[21]
B1_acq_trigger_in_reg[21] = AMPP_FUNCTION(div[13], K1_oX_COORD[7]);


--GB15_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff
GB15_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[21]);


--S2_dffs[65] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[65]
S2_dffs[65] = AMPP_FUNCTION(A1L464, S2_dffs[66], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[66] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[66]
S2_dffs[66] = AMPP_FUNCTION(A1L464, S2_dffs[67], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[67] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[67]
S2_dffs[67] = AMPP_FUNCTION(A1L464, S2_dffs[68], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[22] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[22]
B1_acq_trigger_in_reg[22] = AMPP_FUNCTION(div[13], K1_oX_COORD[8]);


--GB14_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff
GB14_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[22]);


--S2_dffs[68] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[68]
S2_dffs[68] = AMPP_FUNCTION(A1L464, S2_dffs[69], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[69] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[69]
S2_dffs[69] = AMPP_FUNCTION(A1L464, S2_dffs[70], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[70] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[70]
S2_dffs[70] = AMPP_FUNCTION(A1L464, S2_dffs[71], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[23] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[23]
B1_acq_trigger_in_reg[23] = AMPP_FUNCTION(div[13], K1_oX_COORD[9]);


--GB13_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff
GB13_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[23]);


--S2_dffs[71] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[71]
S2_dffs[71] = AMPP_FUNCTION(A1L464, S2_dffs[72], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[72] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[72]
S2_dffs[72] = AMPP_FUNCTION(A1L464, S2_dffs[73], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[73] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[73]
S2_dffs[73] = AMPP_FUNCTION(A1L464, S2_dffs[74], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[24] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[24]
B1_acq_trigger_in_reg[24] = AMPP_FUNCTION(div[13], K1_oY_COORD[0]);


--GB12_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff
GB12_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[24]);


--S2_dffs[74] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[74]
S2_dffs[74] = AMPP_FUNCTION(A1L464, S2_dffs[75], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[75] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[75]
S2_dffs[75] = AMPP_FUNCTION(A1L464, S2_dffs[76], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[76] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[76]
S2_dffs[76] = AMPP_FUNCTION(A1L464, S2_dffs[77], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[25] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[25]
B1_acq_trigger_in_reg[25] = AMPP_FUNCTION(div[13], K1_oY_COORD[10]);


--GB11_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff
GB11_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[25]);


--S2_dffs[77] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[77]
S2_dffs[77] = AMPP_FUNCTION(A1L464, S2_dffs[78], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[78] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[78]
S2_dffs[78] = AMPP_FUNCTION(A1L464, S2_dffs[79], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[79] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[79]
S2_dffs[79] = AMPP_FUNCTION(A1L464, S2_dffs[80], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[26] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[26]
B1_acq_trigger_in_reg[26] = AMPP_FUNCTION(div[13], K1_oY_COORD[11]);


--GB10_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff
GB10_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[26]);


--S2_dffs[80] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[80]
S2_dffs[80] = AMPP_FUNCTION(A1L464, S2_dffs[81], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[81] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[81]
S2_dffs[81] = AMPP_FUNCTION(A1L464, S2_dffs[82], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[82] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[82]
S2_dffs[82] = AMPP_FUNCTION(A1L464, S2_dffs[83], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[27] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[27]
B1_acq_trigger_in_reg[27] = AMPP_FUNCTION(div[13], K1_oY_COORD[1]);


--GB9_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff
GB9_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[27]);


--S2_dffs[83] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[83]
S2_dffs[83] = AMPP_FUNCTION(A1L464, S2_dffs[84], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[84] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[84]
S2_dffs[84] = AMPP_FUNCTION(A1L464, S2_dffs[85], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[85] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[85]
S2_dffs[85] = AMPP_FUNCTION(A1L464, S2_dffs[86], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[28] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[28]
B1_acq_trigger_in_reg[28] = AMPP_FUNCTION(div[13], K1_oY_COORD[2]);


--GB8_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff
GB8_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[28]);


--S2_dffs[86] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[86]
S2_dffs[86] = AMPP_FUNCTION(A1L464, S2_dffs[87], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[87] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[87]
S2_dffs[87] = AMPP_FUNCTION(A1L464, S2_dffs[88], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[88] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[88]
S2_dffs[88] = AMPP_FUNCTION(A1L464, S2_dffs[89], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[29] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[29]
B1_acq_trigger_in_reg[29] = AMPP_FUNCTION(div[13], K1_oY_COORD[3]);


--GB7_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff
GB7_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[29]);


--S2_dffs[89] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[89]
S2_dffs[89] = AMPP_FUNCTION(A1L464, S2_dffs[90], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[99] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[99]
S2_dffs[99] = AMPP_FUNCTION(A1L464, S2_dffs[100], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[100] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[100]
S2_dffs[100] = AMPP_FUNCTION(A1L464, S2_dffs[101], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[33] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[33]
B1_acq_trigger_in_reg[33] = AMPP_FUNCTION(div[13], K1_oY_COORD[7]);


--GB3_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff
GB3_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[33]);


--S2_dffs[101] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[101]
S2_dffs[101] = AMPP_FUNCTION(A1L464, S2_dffs[102], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[90] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[90]
S2_dffs[90] = AMPP_FUNCTION(A1L464, S2_dffs[91], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[91] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[91]
S2_dffs[91] = AMPP_FUNCTION(A1L464, S2_dffs[92], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[30] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[30]
B1_acq_trigger_in_reg[30] = AMPP_FUNCTION(div[13], K1_oY_COORD[4]);


--GB6_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff
GB6_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[30]);


--S2_dffs[92] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[92]
S2_dffs[92] = AMPP_FUNCTION(A1L464, S2_dffs[93], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[93] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[93]
S2_dffs[93] = AMPP_FUNCTION(A1L464, S2_dffs[94], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[94] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[94]
S2_dffs[94] = AMPP_FUNCTION(A1L464, S2_dffs[95], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[31] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[31]
B1_acq_trigger_in_reg[31] = AMPP_FUNCTION(div[13], K1_oY_COORD[5]);


--GB5_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff
GB5_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[31]);


--S2_dffs[95] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[95]
S2_dffs[95] = AMPP_FUNCTION(A1L464, S2_dffs[96], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[96] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[96]
S2_dffs[96] = AMPP_FUNCTION(A1L464, S2_dffs[97], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[97] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[97]
S2_dffs[97] = AMPP_FUNCTION(A1L464, S2_dffs[98], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[32] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32]
B1_acq_trigger_in_reg[32] = AMPP_FUNCTION(div[13], K1_oY_COORD[6]);


--GB4_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff
GB4_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[32]);


--S2_dffs[98] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[98]
S2_dffs[98] = AMPP_FUNCTION(A1L464, S2_dffs[99], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[102] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[102]
S2_dffs[102] = AMPP_FUNCTION(A1L464, S2_dffs[103], !B1_reset_all, P1_trigger_setup_ena);


--S2_dffs[103] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[103]
S2_dffs[103] = AMPP_FUNCTION(A1L464, S2_dffs[104], !B1_reset_all, P1_trigger_setup_ena);


--B1_acq_trigger_in_reg[34] is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[34]
B1_acq_trigger_in_reg[34] = AMPP_FUNCTION(div[13], K1_oY_COORD[8]);


--GB2_holdff is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff
GB2_holdff = AMPP_FUNCTION(div[13], B1_acq_trigger_in_reg[34]);


--S2_dffs[104] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[104]
S2_dffs[104] = AMPP_FUNCTION(A1L464, S2_dffs[105], !B1_reset_all, P1_trigger_setup_ena);


--CB1L5 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr|trigger_happened_ff[1]~92
CB1L5 = AMPP_FUNCTION(CB1L17, CB1_trigger_happened_ff[1]);


--div[12] is div[12]
div[12] = DFFEAS(A1L511, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--div[11] is div[11]
div[11] = DFFEAS(A1L508, CLOCK_50,  ,  ,  ,  ,  ,  ,  );


--A1L508 is div[11]~261
A1L508 = div[11] & !A1L506 # !div[11] & (A1L506 # GND);

--A1L509 is div[11]~262
A1L509 = CARRY(!A1L506 # !div[11]);


--A1L511 is div[12]~263
A1L511 = div[12] & (A1L509 $ GND) # !div[12] & !A1L509 & VCC;

--A1L512 is div[12]~264
A1L512 = CARRY(div[12] & !A1L509);


--A1L514 is div[13]~265
A1L514 = div[13] $ A1L512;


--HB1_pre_hazard[9] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[9]
HB1_pre_hazard[9] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita9, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[8] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[8]
HB1_pre_hazard[8] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita8, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[7] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[7]
HB1_pre_hazard[7] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita7, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[6] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[6]
HB1_pre_hazard[6] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita6, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[5] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[5]
HB1_pre_hazard[5] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita5, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[4] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[4]
HB1_pre_hazard[4] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita4, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[3] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[3]
HB1_pre_hazard[3] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita3, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[2] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[2]
HB1_pre_hazard[2] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita2, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[1]
HB1_pre_hazard[1] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita1, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_pre_hazard[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|pre_hazard[0]
HB1_pre_hazard[0] = AMPP_FUNCTION(div[13], HB1_counter_comb_bita0, !B1_reset_all, DB1_post_trigger_count_enable);


--HB1_counter_comb_bita0 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita0
HB1_counter_comb_bita0 = AMPP_FUNCTION(HB1_pre_hazard[0], GND);

--HB1L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita0~COUT
HB1L2 = AMPP_FUNCTION(HB1_pre_hazard[0]);


--HB1_counter_comb_bita1 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita1
HB1_counter_comb_bita1 = AMPP_FUNCTION(HB1_pre_hazard[1], GND, HB1L2);

--HB1L4 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita1~COUT
HB1L4 = AMPP_FUNCTION(HB1_pre_hazard[1], HB1L2);


--HB1_counter_comb_bita2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita2
HB1_counter_comb_bita2 = AMPP_FUNCTION(HB1_pre_hazard[2], GND, HB1L4);

--HB1L6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita2~COUT
HB1L6 = AMPP_FUNCTION(HB1_pre_hazard[2], HB1L4);


--HB1_counter_comb_bita3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita3
HB1_counter_comb_bita3 = AMPP_FUNCTION(HB1_pre_hazard[3], GND, HB1L6);

--HB1L8 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita3~COUT
HB1L8 = AMPP_FUNCTION(HB1_pre_hazard[3], HB1L6);


--HB1_counter_comb_bita4 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita4
HB1_counter_comb_bita4 = AMPP_FUNCTION(HB1_pre_hazard[4], GND, HB1L8);

--HB1L10 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita4~COUT
HB1L10 = AMPP_FUNCTION(HB1_pre_hazard[4], HB1L8);


--HB1_counter_comb_bita5 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita5
HB1_counter_comb_bita5 = AMPP_FUNCTION(HB1_pre_hazard[5], GND, HB1L10);

--HB1L12 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita5~COUT
HB1L12 = AMPP_FUNCTION(HB1_pre_hazard[5], HB1L10);


--HB1_counter_comb_bita6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita6
HB1_counter_comb_bita6 = AMPP_FUNCTION(HB1_pre_hazard[6], GND, HB1L12);

--HB1L14 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita6~COUT
HB1L14 = AMPP_FUNCTION(HB1_pre_hazard[6], HB1L12);


--HB1_counter_comb_bita7 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita7
HB1_counter_comb_bita7 = AMPP_FUNCTION(HB1_pre_hazard[7], GND, HB1L14);

--HB1L16 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita7~COUT
HB1L16 = AMPP_FUNCTION(HB1_pre_hazard[7], HB1L14);


--HB1_counter_comb_bita8 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita8
HB1_counter_comb_bita8 = AMPP_FUNCTION(HB1_pre_hazard[8], GND, HB1L16);

--HB1L18 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita8~COUT
HB1L18 = AMPP_FUNCTION(HB1_pre_hazard[8], HB1L16);


--HB1_counter_comb_bita9 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita9
HB1_counter_comb_bita9 = AMPP_FUNCTION(HB1_pre_hazard[9], GND, HB1L18);

--HB1L20 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita9~COUT
HB1L20 = AMPP_FUNCTION(HB1_pre_hazard[9], HB1L18);


--HB1_counter_comb_bita10 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita10
HB1_counter_comb_bita10 = AMPP_FUNCTION(HB1_pre_hazard[10], GND, HB1L20);

--HB1L22 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita10~COUT
HB1L22 = AMPP_FUNCTION(HB1_pre_hazard[10], HB1L20);


--DB1L4 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~89
DB1L4 = AMPP_FUNCTION(PB4_Q[1], AB1L1, S1_dffs[4], DB1L3);


--HB1_counter_comb_bita11 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita11
HB1_counter_comb_bita11 = AMPP_FUNCTION(HB1_pre_hazard[11], GND, HB1L22);

--HB1L24 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita11~COUT
HB1L24 = AMPP_FUNCTION(HB1_pre_hazard[11], HB1L22);


--HB1_counter_comb_bita12 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_kkc:auto_generated|counter_comb_bita12
HB1_counter_comb_bita12 = AMPP_FUNCTION(HB1_pre_hazard[12], HB1L24);


--S1_dffs[7] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[7]
S1_dffs[7] = AMPP_FUNCTION(A1L464, S1_dffs[8], !B1_reset_all, P1_trigger_setup_ena);


--RB1L18 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5
RB1L18 = AMPP_FUNCTION(RB1_state[8], RB1_state[1], RB1_state[15], RB1_state[0]);


--SB1_dffe1a[7] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[7]
SB1_dffe1a[7] = AMPP_FUNCTION(A1L464, SB1_w_anode78w[3], C1_CLRN_SIGNAL, C1L6);


--C1L2 is sld_hub:sld_hub_inst|BROADCAST_ENA~29
C1L2 = AMPP_FUNCTION(RB1_state[8], C1_OK_TO_UPDATE_IR_Q);


--PB1L3 is sld_hub:sld_hub_inst|sld_dffex:RESET|Q[0]~58
PB1L3 = AMPP_FUNCTION(PB1_Q[0], SB1_dffe1a[7], C1L2, PB2_Q[0]);


--SB1_w_anode18w[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|w_anode18w[3]
SB1_w_anode18w[3] = AMPP_FUNCTION(PB3_Q[1], C1L44, PB3_Q[3], PB3_Q[2]);


--RB1_state[14] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[14]
RB1_state[14] = AMPP_FUNCTION(A1L464, RB1L29);


--RB1L30 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~29
RB1L30 = AMPP_FUNCTION(RB1_state[12], RB1_state[14]);


--C1L40 is sld_hub:sld_hub_inst|IRSR_D[6]~421
C1L40 = AMPP_FUNCTION(RB1_state[4], PB3_Q[7]);


--N1_WORD_SR[3] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[3]
N1_WORD_SR[3] = AMPP_FUNCTION(A1L464, N1L28, N1L16);


--N1L25 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~965
N1L25 = AMPP_FUNCTION(N1_word_counter[2], N1_word_counter[1], N1_word_counter[0]);


--N1L26 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~966
N1L26 = AMPP_FUNCTION(N1_WORD_SR[3], N1L25, RB1_state[4], N2_clear_signal);


--N1L11 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter~438
N1L11 = AMPP_FUNCTION(N1L5, N1_word_counter[3], N1_word_counter[2], N1L1);


--S4_dffs[3] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[3]
S4_dffs[3] = AMPP_FUNCTION(A1L464, S4L4, !B1_reset_all);


--S4L3 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1570
S4L3 = AMPP_FUNCTION(S4_dffs[3], NB1_safe_q[1], RB1_state[4], B1L79);


--N2_WORD_SR[3] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[3]
N2_WORD_SR[3] = AMPP_FUNCTION(A1L464, N2L36, N2L23);


--N2L33 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1217
N2L33 = AMPP_FUNCTION(N2L31, RB1_state[4], N2_WORD_SR[3], N2_clear_signal);


--RB1L27 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~22
RB1L27 = AMPP_FUNCTION(RB1_state[11], RB1_state[10], RB1_state[14]);


--C1L50 is sld_hub:sld_hub_inst|process0~0
C1L50 = AMPP_FUNCTION(A1L466, RB1_state[2]);


--RB1L41 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt~4
RB1L41 = AMPP_FUNCTION(RB1_tms_cnt[2], RB1_tms_cnt[0], RB1_tms_cnt[1]);


--RB1L39 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt~0
RB1L39 = AMPP_FUNCTION(A1L466, RB1_tms_cnt[0]);


--RB1L40 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt~1
RB1L40 = AMPP_FUNCTION(RB1_tms_cnt[0], RB1_tms_cnt[1]);


--RB1L26 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~21
RB1L26 = AMPP_FUNCTION(RB1_state[9], A1L466);


--RB1L23 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~15
RB1L23 = AMPP_FUNCTION(RB1_state[5], RB1_state[6]);


--E1L119 is I2C_AV_Config:u2|mI2C_DATA[22]~835
E1L119 = J1_oRST_0 & E1L44 & !E1_mSetup_ST.0000;


--E1L45 is I2C_AV_Config:u2|LessThan~398
E1L45 = !E1_LUT_INDEX[4] & !E1_LUT_INDEX[5];


--E1L46 is I2C_AV_Config:u2|LessThan~399
E1L46 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[2] # !E1L43) # !E1L45;


--K1L104Q is touch_spi:u11|mdata_in[4]~reg0
K1L104Q = DFFEAS(K1L110, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--K1L109 is touch_spi:u11|mdata_in~566
K1L109 = K1_mdclk & K1L104Q;


--D1_mSetup_ST.0001 is I2S_LCM_Config:u1|mSetup_ST.0001
D1_mSetup_ST.0001 = DFFEAS(D1L68, TB1_mI2S_CLK, J1_oRST_0,  , D1L44,  ,  ,  ,  );


--D1L46 is I2S_LCM_Config:u1|Select~212
D1L46 = D1_mSetup_ST.0010 # D1_mSetup_ST.0011 & !TB1L95;


--TB1_mACK is I2S_LCM_Config:u1|I2S_Controller:u0|mACK
TB1_mACK = DFFEAS(TB1L23, !TB1_mI2S_CLK, J1_oRST_0,  ,  ,  ,  ,  ,  );


--D1L72 is I2S_LCM_Config:u1|mSetup_ST~173
D1L72 = TB1L95 & D1_mSetup_ST.0011 & TB1_mACK;


--LB1_safe_q[11] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[11]
LB1_safe_q[11] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita11, ~GND, !B1_reset_all, KB1L2, LB1L1);


--LB1_safe_q[3] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[3]
LB1_safe_q[3] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita3, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[9] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[9]
S1_dffs[9] = AMPP_FUNCTION(A1L464, S1_dffs[10], !B1_reset_all, P1_trigger_setup_ena);


--S1_dffs[17] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[17]
S1_dffs[17] = AMPP_FUNCTION(A1L464, S1_dffs[18], !B1_reset_all, P1_trigger_setup_ena);


--KB1L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~98
KB1L3 = AMPP_FUNCTION(LB1_safe_q[11], LB1_safe_q[3], S1_dffs[9], S1_dffs[17]);


--LB1_safe_q[8] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[8]
LB1_safe_q[8] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita8, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[14] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[14]
S1_dffs[14] = AMPP_FUNCTION(A1L464, S1_dffs[15], !B1_reset_all, P1_trigger_setup_ena);


--LB1_safe_q[2] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[2]
LB1_safe_q[2] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita2, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[8] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[8]
S1_dffs[8] = AMPP_FUNCTION(A1L464, S1_dffs[9], !B1_reset_all, P1_trigger_setup_ena);


--KB1L1 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|_~10
KB1L1 = AMPP_FUNCTION(LB1_safe_q[2], S1_dffs[8]);


--KB1L4 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~99
KB1L4 = AMPP_FUNCTION(KB1L3, LB1_safe_q[8], S1_dffs[14], KB1L1);


--LB1_safe_q[9] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[9]
LB1_safe_q[9] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita9, ~GND, !B1_reset_all, KB1L2, LB1L1);


--LB1_safe_q[4] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[4]
LB1_safe_q[4] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita4, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[10] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[10]
S1_dffs[10] = AMPP_FUNCTION(A1L464, S1_dffs[11], !B1_reset_all, P1_trigger_setup_ena);


--S1_dffs[15] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[15]
S1_dffs[15] = AMPP_FUNCTION(A1L464, S1_dffs[16], !B1_reset_all, P1_trigger_setup_ena);


--KB1L5 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~100
KB1L5 = AMPP_FUNCTION(LB1_safe_q[9], LB1_safe_q[4], S1_dffs[10], S1_dffs[15]);


--LB1_safe_q[12] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[12]
LB1_safe_q[12] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita12, ~GND, !B1_reset_all, KB1L2, LB1L1);


--LB1_safe_q[7] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[7]
LB1_safe_q[7] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita7, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[13] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[13]
S1_dffs[13] = AMPP_FUNCTION(A1L464, S1_dffs[14], !B1_reset_all, P1_trigger_setup_ena);


--S1_dffs[18] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[18]
S1_dffs[18] = AMPP_FUNCTION(A1L464, S1_dffs[19], !B1_reset_all, P1_trigger_setup_ena);


--KB1L6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~101
KB1L6 = AMPP_FUNCTION(LB1_safe_q[12], LB1_safe_q[7], S1_dffs[13], S1_dffs[18]);


--LB1_safe_q[5] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[5]
LB1_safe_q[5] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita5, ~GND, !B1_reset_all, KB1L2, LB1L1);


--LB1_safe_q[6] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[6]
LB1_safe_q[6] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita6, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[12] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[12]
S1_dffs[12] = AMPP_FUNCTION(A1L464, S1_dffs[13], !B1_reset_all, P1_trigger_setup_ena);


--S1_dffs[11] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[11]
S1_dffs[11] = AMPP_FUNCTION(A1L464, S1_dffs[12], !B1_reset_all, P1_trigger_setup_ena);


--KB1L7 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~102
KB1L7 = AMPP_FUNCTION(LB1_safe_q[5], LB1_safe_q[6], S1_dffs[12], S1_dffs[11]);


--LB1_safe_q[10] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[10]
LB1_safe_q[10] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita10, ~GND, !B1_reset_all, KB1L2, LB1L1);


--S1_dffs[16] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[16]
S1_dffs[16] = AMPP_FUNCTION(A1L464, S1_dffs[17], !B1_reset_all, P1_trigger_setup_ena);


--LB1_safe_q[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[1]
LB1_safe_q[1] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita1, ~GND, !B1_reset_all, KB1L2, LB1L1);


--KB1L8 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~103
KB1L8 = AMPP_FUNCTION(S1_dffs[7], LB1_safe_q[10], S1_dffs[16], LB1_safe_q[1]);


--LB1_safe_q[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|safe_q[0]
LB1_safe_q[0] = AMPP_FUNCTION(div[13], LB1_counter_comb_bita0, ~GND, !B1_reset_all, KB1L2, LB1L1);


--KB1L9 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~104
KB1L9 = AMPP_FUNCTION(KB1L7, KB1L8, S1_dffs[6], LB1_safe_q[0]);


--KB1L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_4vh:auto_generated|aeb_int~0
KB1L2 = AMPP_FUNCTION(KB1L4, KB1L5, KB1L6, KB1L9);


--BB1L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~85
BB1L2 = AMPP_FUNCTION(CB1L19, BB1_segment_write_addr_adv_ena, PB4_Q[1], KB1L2);


--K1_irq_cnt[0] is touch_spi:u11|irq_cnt[0]
K1_irq_cnt[0] = DFFEAS(K1L82, CLOCK_50, J1_oRST_0,  , K1L187,  ,  ,  ,  );


--K1_irq_cnt[1] is touch_spi:u11|irq_cnt[1]
K1_irq_cnt[1] = DFFEAS(K1L85, CLOCK_50, J1_oRST_0,  , K1L187,  ,  ,  ,  );


--K1_irq_cnt[2] is touch_spi:u11|irq_cnt[2]
K1_irq_cnt[2] = DFFEAS(K1L88, CLOCK_50, J1_oRST_0,  , K1L187,  ,  ,  ,  );


--K1_irq_cnt[3] is touch_spi:u11|irq_cnt[3]
K1_irq_cnt[3] = DFFEAS(K1L91, CLOCK_50, J1_oRST_0,  , K1L187,  ,  ,  ,  );


--K1_irq_cnt[4] is touch_spi:u11|irq_cnt[4]
K1_irq_cnt[4] = DFFEAS(K1L94, CLOCK_50, J1_oRST_0,  , K1L187,  ,  ,  ,  );


--K1_irq_cnt[5] is touch_spi:u11|irq_cnt[5]
K1_irq_cnt[5] = DFFEAS(K1L97, CLOCK_50, J1_oRST_0,  , K1L187,  ,  ,  ,  );


--K1_oADC_CS is touch_spi:u11|oADC_CS
K1_oADC_CS = DFFEAS(K1L148, CLOCK_50, J1_oRST_0,  ,  ,  ,  ,  ,  );


--SB1_w_anode78w[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|w_anode78w[3]
SB1_w_anode78w[3] = AMPP_FUNCTION(PB3_Q[1], PB3_Q[3], PB3_Q[2], C1L44);


--RB1_state[13] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[13]
RB1_state[13] = AMPP_FUNCTION(A1L464, RB1L28, A1L466);


--RB1L29 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~28
RB1L29 = AMPP_FUNCTION(A1L466, RB1_state[13]);


--N2L34 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1218
N2L34 = AMPP_FUNCTION(altera_internal_jtag, RB1_state[4], C1_jtag_debug_mode_usr1, RB1_state[8]);


--N1L27 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~967
N1L27 = AMPP_FUNCTION(N1_word_counter[2], N1_word_counter[0]);


--N1L28 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~968
N1L28 = AMPP_FUNCTION(N2L34, N1L24, N1L27, N1_word_counter[1]);


--S4_dffs[4] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[4]
S4_dffs[4] = AMPP_FUNCTION(A1L464, S4L5, !B1_reset_all);


--S4L4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1571
S4L4 = AMPP_FUNCTION(S4_dffs[4], NB1_safe_q[2], RB1_state[4], B1L79);


--N2L35 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1219
N2L35 = AMPP_FUNCTION(N2_word_counter[1], N2_word_counter[2], N2_word_counter[3]);


--N2L36 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~1220
N2L36 = AMPP_FUNCTION(N2L34, N1L24, N2L35, N2_word_counter[0]);


--E1L127 is I2C_AV_Config:u2|reduce_or~1833
E1L127 = E1_LUT_INDEX[2] & E1_LUT_INDEX[3] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[1]) # !E1_LUT_INDEX[2] & E1_LUT_INDEX[0] & E1_LUT_INDEX[1] & !E1_LUT_INDEX[3];


--E1L128 is I2C_AV_Config:u2|reduce_or~1834
E1L128 = E1_LUT_INDEX[1] & E1_LUT_INDEX[0] & (E1_LUT_INDEX[3]) # !E1_LUT_INDEX[1] & E1_LUT_INDEX[2] & (!E1_LUT_INDEX[3] # !E1_LUT_INDEX[0]);


--E1L129 is I2C_AV_Config:u2|reduce_or~1835
E1L129 = E1_LUT_INDEX[2] & (E1_LUT_INDEX[0] & (E1_LUT_INDEX[3]) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[1]);


--E1L130 is I2C_AV_Config:u2|reduce_or~1836
E1L130 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[4]) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] & E1L128 # !E1_LUT_INDEX[4] & (E1L129));


--E1L131 is I2C_AV_Config:u2|reduce_or~1837
E1L131 = E1_LUT_INDEX[0] & !E1_LUT_INDEX[1] & !E1_LUT_INDEX[3] & !E1_LUT_INDEX[2];


--E1L132 is I2C_AV_Config:u2|reduce_or~1838
E1L132 = E1_LUT_INDEX[5] & (E1L130 & (!E1L131) # !E1L130 & E1L127) # !E1_LUT_INDEX[5] & (E1L130);


--E1L133 is I2C_AV_Config:u2|reduce_or~1839
E1L133 = E1_LUT_INDEX[2] # E1_LUT_INDEX[3] # E1_LUT_INDEX[0] & E1_LUT_INDEX[1];


--E1L134 is I2C_AV_Config:u2|reduce_or~1840
E1L134 = E1_LUT_INDEX[4] & E1_LUT_INDEX[5] & E1L133;


--E1L135 is I2C_AV_Config:u2|reduce_or~1841
E1L135 = E1_LUT_INDEX[4] & !E1_LUT_INDEX[5] & (E1_LUT_INDEX[0]) # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[2] & (!E1_LUT_INDEX[0]) # !E1_LUT_INDEX[2] & E1_LUT_INDEX[5] & E1_LUT_INDEX[0]);


--E1L136 is I2C_AV_Config:u2|reduce_or~1842
E1L136 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[2] & E1_LUT_INDEX[4] # !E1_LUT_INDEX[2] & (E1_LUT_INDEX[0])) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[0] $ (!E1_LUT_INDEX[2] & E1_LUT_INDEX[4]));


--E1L137 is I2C_AV_Config:u2|reduce_or~1843
E1L137 = E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] $ E1_LUT_INDEX[3] # !E1_LUT_INDEX[1]) # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] $ (!E1_LUT_INDEX[1] & E1_LUT_INDEX[3]));


--E1L138 is I2C_AV_Config:u2|reduce_or~1844
E1L138 = E1_LUT_INDEX[0] & (E1_LUT_INDEX[3] $ (!E1_LUT_INDEX[2] # !E1_LUT_INDEX[1])) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[3] & (E1_LUT_INDEX[1] # E1_LUT_INDEX[2]);


--E1L139 is I2C_AV_Config:u2|reduce_or~1845
E1L139 = E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] & E1_LUT_INDEX[3]) # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[1] & (!E1_LUT_INDEX[3] # !E1_LUT_INDEX[2]) # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[2] # E1_LUT_INDEX[3]));


--E1L140 is I2C_AV_Config:u2|reduce_or~1846
E1L140 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[4]) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] & E1L138 # !E1_LUT_INDEX[4] & (E1L139));


--E1L141 is I2C_AV_Config:u2|reduce_or~1847
E1L141 = E1_LUT_INDEX[5] & (E1L140 & (!E1L131) # !E1L140 & !E1L137) # !E1_LUT_INDEX[5] & (E1L140);


--E1L142 is I2C_AV_Config:u2|reduce_or~1848
E1L142 = E1_LUT_INDEX[0] & E1_LUT_INDEX[1] & E1_LUT_INDEX[2] & E1_LUT_INDEX[3] # !E1_LUT_INDEX[0] & !E1_LUT_INDEX[2] & (E1_LUT_INDEX[1] $ E1_LUT_INDEX[3]);


--E1L143 is I2C_AV_Config:u2|reduce_or~1849
E1L143 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[1] $ E1_LUT_INDEX[2]) # !E1_LUT_INDEX[3] & !E1_LUT_INDEX[0] & E1_LUT_INDEX[1] & E1_LUT_INDEX[2];


--E1L144 is I2C_AV_Config:u2|reduce_or~1850
E1L144 = E1_LUT_INDEX[0] & (E1_LUT_INDEX[3] & !E1_LUT_INDEX[1] # !E1_LUT_INDEX[3] & (!E1_LUT_INDEX[2])) # !E1_LUT_INDEX[0] & !E1_LUT_INDEX[3] & (E1_LUT_INDEX[1] # E1_LUT_INDEX[2]);


--E1L145 is I2C_AV_Config:u2|reduce_or~1851
E1L145 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[4]) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] & E1L143 # !E1_LUT_INDEX[4] & (E1L144));


--E1L146 is I2C_AV_Config:u2|reduce_or~1852
E1L146 = E1_LUT_INDEX[5] & (E1L145 & (E1L131) # !E1L145 & E1L142) # !E1_LUT_INDEX[5] & (E1L145);


--E1L147 is I2C_AV_Config:u2|reduce_or~1853
E1L147 = E1_LUT_INDEX[2] & (E1_LUT_INDEX[5] # E1_LUT_INDEX[0] & E1_LUT_INDEX[1]) # !E1_LUT_INDEX[2] & (E1_LUT_INDEX[1]);


--E1L148 is I2C_AV_Config:u2|reduce_or~1854
E1L148 = E1_LUT_INDEX[2] & E1_LUT_INDEX[5] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[1]);


--E1L149 is I2C_AV_Config:u2|reduce_or~1855
E1L149 = E1_LUT_INDEX[2] & E1_LUT_INDEX[0] & !E1_LUT_INDEX[1] & !E1_LUT_INDEX[5] # !E1_LUT_INDEX[2] & E1_LUT_INDEX[5] & (E1_LUT_INDEX[0] # !E1_LUT_INDEX[1]);


--E1L150 is I2C_AV_Config:u2|reduce_or~1856
E1L150 = E1_LUT_INDEX[4] & (E1_LUT_INDEX[3]) # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[3] & E1L148 # !E1_LUT_INDEX[3] & (E1L149));


--E1L151 is I2C_AV_Config:u2|reduce_or~1857
E1L151 = !E1_LUT_INDEX[5] & (E1_LUT_INDEX[1] $ (E1_LUT_INDEX[0] & !E1_LUT_INDEX[2]));


--E1L152 is I2C_AV_Config:u2|reduce_or~1858
E1L152 = E1_LUT_INDEX[4] & (E1L150 & (E1L151) # !E1L150 & !E1L147) # !E1_LUT_INDEX[4] & (E1L150);


--E1L153 is I2C_AV_Config:u2|reduce_or~1859
E1L153 = E1_LUT_INDEX[4] & (E1_LUT_INDEX[2]) # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[3] # !E1_LUT_INDEX[1] & E1_LUT_INDEX[2]);


--E1L154 is I2C_AV_Config:u2|reduce_or~1860
E1L154 = E1_LUT_INDEX[1] & (E1_LUT_INDEX[4] # E1_LUT_INDEX[2] $ !E1_LUT_INDEX[3]) # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[3] & E1_LUT_INDEX[4]);


--E1L155 is I2C_AV_Config:u2|reduce_or~1861
E1L155 = E1_LUT_INDEX[5] # E1_LUT_INDEX[0] $ E1L154;


--E1L156 is I2C_AV_Config:u2|reduce_or~1862
E1L156 = E1L154 & (E1_LUT_INDEX[0] # E1_LUT_INDEX[5]);


--E1L157 is I2C_AV_Config:u2|reduce_or~1863
E1L157 = E1_LUT_INDEX[4] & (E1L156 & (E1L155) # !E1L156 & E1L153) # !E1_LUT_INDEX[4] & (E1L153 & !E1L155 # !E1L153 & (E1L156));


--E1L158 is I2C_AV_Config:u2|reduce_or~1864
E1L158 = E1_LUT_INDEX[1] & (E1_LUT_INDEX[2] $ !E1_LUT_INDEX[3]) # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[0] & E1_LUT_INDEX[2] & E1_LUT_INDEX[3] # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] # E1_LUT_INDEX[3]));


--E1L159 is I2C_AV_Config:u2|reduce_or~1865
E1L159 = E1_LUT_INDEX[2] $ (E1_LUT_INDEX[3] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[1]));


--E1L160 is I2C_AV_Config:u2|reduce_or~1866
E1L160 = E1_LUT_INDEX[0] & E1_LUT_INDEX[1] & (!E1_LUT_INDEX[3] # !E1_LUT_INDEX[2]) # !E1_LUT_INDEX[0] & !E1_LUT_INDEX[1] & (E1_LUT_INDEX[2] # E1_LUT_INDEX[3]);


--E1L161 is I2C_AV_Config:u2|reduce_or~1867
E1L161 = E1_LUT_INDEX[4] & (E1_LUT_INDEX[5]) # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[5] & !E1L159 # !E1_LUT_INDEX[5] & (E1L160));


--E1L162 is I2C_AV_Config:u2|reduce_or~1868
E1L162 = E1_LUT_INDEX[4] & (E1L161 & (!E1L131) # !E1L161 & !E1L158) # !E1_LUT_INDEX[4] & (E1L161);


--E1L163 is I2C_AV_Config:u2|reduce_or~1869
E1L163 = E1_LUT_INDEX[2] & (E1_LUT_INDEX[1] # E1_LUT_INDEX[4] & !E1_LUT_INDEX[3]) # !E1_LUT_INDEX[2] & E1_LUT_INDEX[3] & (!E1_LUT_INDEX[4] # !E1_LUT_INDEX[1]);


--E1L164 is I2C_AV_Config:u2|reduce_or~1870
E1L164 = E1_LUT_INDEX[2] & (E1_LUT_INDEX[1] & E1_LUT_INDEX[4] & !E1_LUT_INDEX[3] # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[4] $ !E1_LUT_INDEX[3])) # !E1_LUT_INDEX[2] & (E1_LUT_INDEX[1] $ (!E1_LUT_INDEX[4] & E1_LUT_INDEX[3]));


--E1L165 is I2C_AV_Config:u2|reduce_or~1871
E1L165 = E1L164 # E1_LUT_INDEX[0] & !E1_LUT_INDEX[4];


--E1L166 is I2C_AV_Config:u2|reduce_or~1872
E1L166 = E1_LUT_INDEX[4] & (!E1L164 # !E1_LUT_INDEX[0]);


--E1L167 is I2C_AV_Config:u2|reduce_or~1873
E1L167 = E1_LUT_INDEX[5] & !E1L165 & (E1L163 $ E1L166) # !E1_LUT_INDEX[5] & E1L165 & (E1L163 $ !E1L166);


--E1L168 is I2C_AV_Config:u2|reduce_or~1874
E1L168 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[2] # E1_LUT_INDEX[0] $ E1_LUT_INDEX[1]);


--E1L169 is I2C_AV_Config:u2|reduce_or~1875
E1L169 = E1_LUT_INDEX[0] & !E1_LUT_INDEX[3] & (E1_LUT_INDEX[1] $ !E1_LUT_INDEX[2]) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[2] & (!E1_LUT_INDEX[3] # !E1_LUT_INDEX[1]);


--E1L170 is I2C_AV_Config:u2|reduce_or~1876
E1L170 = E1_LUT_INDEX[1] & (E1_LUT_INDEX[2] & !E1_LUT_INDEX[3]) # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[0] & E1_LUT_INDEX[2] # !E1_LUT_INDEX[0] & !E1_LUT_INDEX[2] & E1_LUT_INDEX[3]);


--E1L171 is I2C_AV_Config:u2|reduce_or~1877
E1L171 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[4]) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] & E1L169 # !E1_LUT_INDEX[4] & (E1L170));


--E1L172 is I2C_AV_Config:u2|reduce_or~1878
E1L172 = E1_LUT_INDEX[5] & (E1L171 & (!E1L131) # !E1L171 & E1L168) # !E1_LUT_INDEX[5] & (E1L171);


--E1L173 is I2C_AV_Config:u2|reduce_or~1879
E1L173 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[0] & (E1_LUT_INDEX[2]) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[1]);


--E1L174 is I2C_AV_Config:u2|reduce_or~1880
E1L174 = !E1_LUT_INDEX[3] & (E1_LUT_INDEX[1] & (!E1_LUT_INDEX[2]) # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[2]));


--E1L175 is I2C_AV_Config:u2|reduce_or~1881
E1L175 = E1_LUT_INDEX[5] & E1L173 # !E1_LUT_INDEX[5] & (E1L174);


--E1L176 is I2C_AV_Config:u2|reduce_or~1882
E1L176 = E1_LUT_INDEX[0] & E1_LUT_INDEX[1] & !E1_LUT_INDEX[2] # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] & !E1_LUT_INDEX[1] # !E1_LUT_INDEX[2] & (E1_LUT_INDEX[3]));


--E1L177 is I2C_AV_Config:u2|reduce_or~1883
E1L177 = E1_LUT_INDEX[4] & (E1L176 & !E1_LUT_INDEX[5]) # !E1_LUT_INDEX[4] & E1L175;


--E1L178 is I2C_AV_Config:u2|reduce_or~1884
E1L178 = E1_LUT_INDEX[0] & !E1_LUT_INDEX[4] & (E1_LUT_INDEX[3] $ E1_LUT_INDEX[1]) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[3] & E1_LUT_INDEX[4];


--E1L179 is I2C_AV_Config:u2|reduce_or~1885
E1L179 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[4] & E1_LUT_INDEX[0] # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[1])) # !E1_LUT_INDEX[3] & (E1_LUT_INDEX[1]);


--E1L180 is I2C_AV_Config:u2|reduce_or~1886
E1L180 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] $ E1L178 $ !E1L179) # !E1_LUT_INDEX[5] & (E1L178 & !E1_LUT_INDEX[4] & !E1L179 # !E1L178 & (E1L179));


--E1L181 is I2C_AV_Config:u2|reduce_or~1887
E1L181 = E1L178 & (E1_LUT_INDEX[5] $ E1_LUT_INDEX[4] $ E1L179) # !E1L178 & E1_LUT_INDEX[5] & E1_LUT_INDEX[4] & !E1L179;


--E1L182 is I2C_AV_Config:u2|reduce_or~1888
E1L182 = E1_LUT_INDEX[2] & (E1L180 $ !E1L181) # !E1_LUT_INDEX[2] & !E1L180 & E1L181;


--E1L183 is I2C_AV_Config:u2|reduce_or~1889
E1L183 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[0] & (!E1_LUT_INDEX[2]) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[5] & E1_LUT_INDEX[2]) # !E1_LUT_INDEX[3] & (E1_LUT_INDEX[5] & !E1_LUT_INDEX[0] & !E1_LUT_INDEX[2] # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[2]));


--E1L184 is I2C_AV_Config:u2|reduce_or~1890
E1L184 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[0] & (!E1_LUT_INDEX[2] # !E1_LUT_INDEX[3]) # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[3] # E1_LUT_INDEX[2])) # !E1_LUT_INDEX[5] & E1_LUT_INDEX[2] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[3]);


--E1L185 is I2C_AV_Config:u2|reduce_or~1891
E1L185 = !E1_LUT_INDEX[4] & (E1_LUT_INDEX[1] $ E1_LUT_INDEX[0]);


--E1L186 is I2C_AV_Config:u2|reduce_or~1892
E1L186 = E1_LUT_INDEX[1] & (E1_LUT_INDEX[4] $ E1_LUT_INDEX[0]);


--E1L187 is I2C_AV_Config:u2|reduce_or~1893
E1L187 = E1L185 & E1L183 & (E1L184 $ E1L186) # !E1L185 & !E1L184 & (E1L183 $ E1L186);


--E1L188 is I2C_AV_Config:u2|reduce_or~1894
E1L188 = E1_LUT_INDEX[3] & E1_LUT_INDEX[0] & E1_LUT_INDEX[1] & E1_LUT_INDEX[2] # !E1_LUT_INDEX[3] & !E1_LUT_INDEX[2] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[1]);


--E1L189 is I2C_AV_Config:u2|reduce_or~1895
E1L189 = E1_LUT_INDEX[2] & (E1_LUT_INDEX[0] # E1_LUT_INDEX[1] # !E1_LUT_INDEX[3]);


--E1L190 is I2C_AV_Config:u2|reduce_or~1896
E1L190 = E1_LUT_INDEX[4] & !E1_LUT_INDEX[5] & !E1L188 & !E1L189 # !E1_LUT_INDEX[4] & E1L188 & (E1_LUT_INDEX[5] $ E1L189);


--E1L191 is I2C_AV_Config:u2|reduce_or~1897
E1L191 = E1_LUT_INDEX[4] & (E1_LUT_INDEX[2] # E1_LUT_INDEX[3] & E1_LUT_INDEX[0]) # !E1_LUT_INDEX[4] & E1_LUT_INDEX[3] & E1_LUT_INDEX[0] & E1_LUT_INDEX[2];


--E1L192 is I2C_AV_Config:u2|reduce_or~1898
E1L192 = E1_LUT_INDEX[4] & (E1_LUT_INDEX[0] & (E1_LUT_INDEX[2]) # !E1_LUT_INDEX[0] & E1_LUT_INDEX[3]) # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[3] $ (E1_LUT_INDEX[2]));


--E1L193 is I2C_AV_Config:u2|reduce_or~1899
E1L193 = E1_LUT_INDEX[1] & E1_LUT_INDEX[2] & E1_LUT_INDEX[3] # !E1_LUT_INDEX[1] & (E1_LUT_INDEX[2] $ E1_LUT_INDEX[3]);


--E1L194 is I2C_AV_Config:u2|reduce_or~1900
E1L194 = E1_LUT_INDEX[1] & (E1L193) # !E1_LUT_INDEX[1] & E1_LUT_INDEX[0] & E1_LUT_INDEX[4] & !E1L193;


--E1L195 is I2C_AV_Config:u2|reduce_or~1901
E1L195 = E1_LUT_INDEX[5] & E1L174 & !E1_LUT_INDEX[4] # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] $ E1L194);


--E1L196 is I2C_AV_Config:u2|reduce_or~1902
E1L196 = E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] # E1_LUT_INDEX[1] $ E1_LUT_INDEX[3]) # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[1] # E1_LUT_INDEX[2] $ E1_LUT_INDEX[3]);


--E1L197 is I2C_AV_Config:u2|reduce_or~1903
E1L197 = E1_LUT_INDEX[0] & (E1_LUT_INDEX[2] & (E1_LUT_INDEX[3]) # !E1_LUT_INDEX[2] & (!E1_LUT_INDEX[3] # !E1_LUT_INDEX[1])) # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[1] # E1_LUT_INDEX[3]);


--E1L198 is I2C_AV_Config:u2|reduce_or~1904
E1L198 = E1_LUT_INDEX[3] & (E1_LUT_INDEX[0] & (!E1_LUT_INDEX[2] # !E1_LUT_INDEX[1]) # !E1_LUT_INDEX[0] & (E1_LUT_INDEX[1] # E1_LUT_INDEX[2]));


--E1L199 is I2C_AV_Config:u2|reduce_or~1905
E1L199 = E1_LUT_INDEX[4] & (E1_LUT_INDEX[5]) # !E1_LUT_INDEX[4] & (E1_LUT_INDEX[5] & !E1L197 # !E1_LUT_INDEX[5] & (E1L198));


--E1L200 is I2C_AV_Config:u2|reduce_or~1906
E1L200 = E1_LUT_INDEX[4] & (E1L199 & (E1L131) # !E1L199 & E1L196) # !E1_LUT_INDEX[4] & (E1L199);


--K1L103Q is touch_spi:u11|mdata_in[3]~reg0
K1L103Q = DFFEAS(K1L111, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--K1L110 is touch_spi:u11|mdata_in~567
K1L110 = K1L103Q # !K1_mdclk;


--D1_mSetup_ST.0000 is I2S_LCM_Config:u1|mSetup_ST.0000
D1_mSetup_ST.0000 = DFFEAS(D1L47, TB1_mI2S_CLK, J1_oRST_0,  , D1L44,  ,  ,  ,  );


--TB1L23 is I2S_LCM_Config:u1|I2S_Controller:u0|mACK~224
TB1L23 = D1_mI2S_STR & (TB1L2 & LCM_SDA # !TB1L2 & (TB1_mACK));


--LB1_counter_comb_bita0 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita0
LB1_counter_comb_bita0 = AMPP_FUNCTION(LB1_safe_q[0], GND);

--LB1L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita0~COUT
LB1L3 = AMPP_FUNCTION(LB1_safe_q[0]);


--LB1_counter_comb_bita1 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita1
LB1_counter_comb_bita1 = AMPP_FUNCTION(LB1_safe_q[1], GND, LB1L3);

--LB1L5 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita1~COUT
LB1L5 = AMPP_FUNCTION(LB1_safe_q[1], LB1L3);


--LB1_counter_comb_bita2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita2
LB1_counter_comb_bita2 = AMPP_FUNCTION(LB1_safe_q[2], GND, LB1L5);

--LB1L7 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita2~COUT
LB1L7 = AMPP_FUNCTION(LB1_safe_q[2], LB1L5);


--LB1_counter_comb_bita3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita3
LB1_counter_comb_bita3 = AMPP_FUNCTION(LB1_safe_q[3], GND, LB1L7);

--LB1L9 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita3~COUT
LB1L9 = AMPP_FUNCTION(LB1_safe_q[3], LB1L7);


--LB1_counter_comb_bita4 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita4
LB1_counter_comb_bita4 = AMPP_FUNCTION(LB1_safe_q[4], GND, LB1L9);

--LB1L11 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita4~COUT
LB1L11 = AMPP_FUNCTION(LB1_safe_q[4], LB1L9);


--LB1_counter_comb_bita5 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita5
LB1_counter_comb_bita5 = AMPP_FUNCTION(LB1_safe_q[5], GND, LB1L11);

--LB1L13 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita5~COUT
LB1L13 = AMPP_FUNCTION(LB1_safe_q[5], LB1L11);


--LB1_counter_comb_bita6 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita6
LB1_counter_comb_bita6 = AMPP_FUNCTION(LB1_safe_q[6], GND, LB1L13);

--LB1L15 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita6~COUT
LB1L15 = AMPP_FUNCTION(LB1_safe_q[6], LB1L13);


--LB1_counter_comb_bita7 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita7
LB1_counter_comb_bita7 = AMPP_FUNCTION(LB1_safe_q[7], GND, LB1L15);

--LB1L17 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita7~COUT
LB1L17 = AMPP_FUNCTION(LB1_safe_q[7], LB1L15);


--LB1_counter_comb_bita8 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita8
LB1_counter_comb_bita8 = AMPP_FUNCTION(LB1_safe_q[8], GND, LB1L17);

--LB1L19 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita8~COUT
LB1L19 = AMPP_FUNCTION(LB1_safe_q[8], LB1L17);


--LB1_counter_comb_bita9 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita9
LB1_counter_comb_bita9 = AMPP_FUNCTION(LB1_safe_q[9], GND, LB1L19);

--LB1L21 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita9~COUT
LB1L21 = AMPP_FUNCTION(LB1_safe_q[9], LB1L19);


--LB1_counter_comb_bita10 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita10
LB1_counter_comb_bita10 = AMPP_FUNCTION(LB1_safe_q[10], GND, LB1L21);

--LB1L23 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita10~COUT
LB1L23 = AMPP_FUNCTION(LB1_safe_q[10], LB1L21);


--LB1_counter_comb_bita11 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita11
LB1_counter_comb_bita11 = AMPP_FUNCTION(LB1_safe_q[11], GND, LB1L23);

--LB1L25 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita11~COUT
LB1L25 = AMPP_FUNCTION(LB1_safe_q[11], LB1L23);


--LB1L1 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|_~2
LB1L1 = AMPP_FUNCTION(BB1_segment_write_addr_adv_ena, KB1L2);


--LB1_counter_comb_bita12 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_jtb:auto_generated|counter_comb_bita12
LB1_counter_comb_bita12 = AMPP_FUNCTION(LB1_safe_q[12], LB1L25);


--S1_dffs[19] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[19]
S1_dffs[19] = AMPP_FUNCTION(A1L464, S1_dffs[20], !B1_reset_all, P1_trigger_setup_ena);


--K1L82 is touch_spi:u11|irq_cnt[0]~518
K1L82 = K1_irq_cnt[0] $ VCC;

--K1L83 is touch_spi:u11|irq_cnt[0]~519
K1L83 = CARRY(K1_irq_cnt[0]);


--K1L85 is touch_spi:u11|irq_cnt[1]~520
K1L85 = K1_irq_cnt[1] & !K1L83 # !K1_irq_cnt[1] & (K1L83 # GND);

--K1L86 is touch_spi:u11|irq_cnt[1]~521
K1L86 = CARRY(!K1L83 # !K1_irq_cnt[1]);


--K1L88 is touch_spi:u11|irq_cnt[2]~522
K1L88 = K1_irq_cnt[2] & (K1L86 $ GND) # !K1_irq_cnt[2] & !K1L86 & VCC;

--K1L89 is touch_spi:u11|irq_cnt[2]~523
K1L89 = CARRY(K1_irq_cnt[2] & !K1L86);


--K1L91 is touch_spi:u11|irq_cnt[3]~524
K1L91 = K1_irq_cnt[3] & !K1L89 # !K1_irq_cnt[3] & (K1L89 # GND);

--K1L92 is touch_spi:u11|irq_cnt[3]~525
K1L92 = CARRY(!K1L89 # !K1_irq_cnt[3]);


--K1L94 is touch_spi:u11|irq_cnt[4]~526
K1L94 = K1_irq_cnt[4] & (K1L92 $ GND) # !K1_irq_cnt[4] & !K1L92 & VCC;

--K1L95 is touch_spi:u11|irq_cnt[4]~527
K1L95 = CARRY(K1_irq_cnt[4] & !K1L92);


--K1L97 is touch_spi:u11|irq_cnt[5]~528
K1L97 = K1_irq_cnt[5] $ K1L95;


--K1L146 is touch_spi:u11|oADC_CS~84
K1L146 = K1_spi_ctrl_cnt[1] # K1_spi_ctrl_cnt[6] $ K1_spi_ctrl_cnt[0] # !K1L1;


--K1L147 is touch_spi:u11|oADC_CS~85
K1L147 = !K1_oADC_CS & (K1L146 # !K1_transmit_en # !K1L7);


--K1L148 is touch_spi:u11|oADC_CS~86
K1L148 = !K1L147 & (!K1L114 # !K1L2 # !K1L191Q);


--RB1L28 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~26
RB1L28 = AMPP_FUNCTION(RB1_state[12], RB1_state[13]);


--S4_dffs[5] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[5]
S4_dffs[5] = AMPP_FUNCTION(A1L464, S4L6, !B1_reset_all);


--S4L5 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1572
S4L5 = AMPP_FUNCTION(S4_dffs[5], NB1_safe_q[3], RB1_state[4], B1L79);


--K1L102Q is touch_spi:u11|mdata_in[2]~reg0
K1L102Q = DFFEAS(K1L112, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--K1L111 is touch_spi:u11|mdata_in~568
K1L111 = K1_mdclk & K1L102Q;


--D1L47 is I2S_LCM_Config:u1|Select~213
D1L47 = !D1_mSetup_ST.0100 & (TB1_mACK # !D1_mSetup_ST.0011 # !TB1L95);


--S1_dffs[20] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[20]
S1_dffs[20] = AMPP_FUNCTION(A1L464, S1_dffs[21], !B1_reset_all, P1_trigger_setup_ena);


--S4_dffs[6] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[6]
S4_dffs[6] = AMPP_FUNCTION(A1L464, S4L7, !B1_reset_all);


--S4L6 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1573
S4L6 = AMPP_FUNCTION(S4_dffs[6], NB1_safe_q[4], RB1_state[4], B1L79);


--K1L101Q is touch_spi:u11|mdata_in[1]~reg0
K1L101Q = DFFEAS(K1L100, CLOCK_50, J1_oRST_0,  , K1L150,  ,  ,  ,  );


--K1L112 is touch_spi:u11|mdata_in~569
K1L112 = K1_mdclk & K1L101Q;


--S1_dffs[21] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[21]
S1_dffs[21] = AMPP_FUNCTION(A1L464, S2_dffs[0], !B1_reset_all, P1_trigger_setup_ena);


--S4_dffs[7] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[7]
S4_dffs[7] = AMPP_FUNCTION(A1L464, S4L8, !B1_reset_all);


--S4L7 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1574
S4L7 = AMPP_FUNCTION(S4_dffs[7], NB1_safe_q[5], RB1_state[4], B1L79);


--S4_dffs[8] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[8]
S4_dffs[8] = AMPP_FUNCTION(A1L464, S4L9, !B1_reset_all);


--S4L8 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1575
S4L8 = AMPP_FUNCTION(S4_dffs[8], NB1_safe_q[6], RB1_state[4], B1L79);


--S4_dffs[9] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[9]
S4_dffs[9] = AMPP_FUNCTION(A1L464, S4L10, !B1_reset_all);


--S4L9 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1576
S4L9 = AMPP_FUNCTION(S4_dffs[9], NB1_safe_q[7], RB1_state[4], B1L79);


--S4_dffs[10] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[10]
S4_dffs[10] = AMPP_FUNCTION(A1L464, S4L11, !B1_reset_all);


--S4L10 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1577
S4L10 = AMPP_FUNCTION(S4_dffs[10], NB1_safe_q[8], RB1_state[4], B1L79);


--S4_dffs[11] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[11]
S4_dffs[11] = AMPP_FUNCTION(A1L464, S4L12, !B1_reset_all);


--S4L11 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1578
S4L11 = AMPP_FUNCTION(S4_dffs[11], NB1_safe_q[9], RB1_state[4], B1L79);


--S4_dffs[12] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[12]
S4_dffs[12] = AMPP_FUNCTION(A1L464, S4L13, !B1_reset_all);


--S4L12 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1579
S4L12 = AMPP_FUNCTION(S4_dffs[12], NB1_safe_q[10], RB1_state[4], B1L79);


--S4_dffs[13] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[13]
S4_dffs[13] = AMPP_FUNCTION(A1L464, S4L14, !B1_reset_all);


--S4L13 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1580
S4L13 = AMPP_FUNCTION(S4_dffs[13], NB1_safe_q[11], RB1_state[4], B1L79);


--S4_dffs[14] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[14]
S4_dffs[14] = AMPP_FUNCTION(A1L464, S4L15, !B1_reset_all);


--S4L14 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1581
S4L14 = AMPP_FUNCTION(S4_dffs[14], NB1_safe_q[12], RB1_state[4], B1L79);


--S4_dffs[15] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[15]
S4_dffs[15] = AMPP_FUNCTION(A1L464, S4L16, !B1_reset_all);


--MB1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[0]
MB1_dffs[0] = AMPP_FUNCTION(div[13], NB1_safe_q[0], !B1_reset_all, Q1L5);


--S4L15 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1582
S4L15 = AMPP_FUNCTION(S4_dffs[15], MB1_dffs[0], RB1_state[4], B1L79);


--S4_dffs[16] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[16]
S4_dffs[16] = AMPP_FUNCTION(A1L464, S4L17, !B1_reset_all);


--MB1_dffs[1] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[1]
MB1_dffs[1] = AMPP_FUNCTION(div[13], NB1_safe_q[1], !B1_reset_all, Q1L5);


--S4L16 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1583
S4L16 = AMPP_FUNCTION(S4_dffs[16], MB1_dffs[1], RB1_state[4], B1L79);


--S4_dffs[17] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[17]
S4_dffs[17] = AMPP_FUNCTION(A1L464, S4L18, !B1_reset_all);


--MB1_dffs[2] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[2]
MB1_dffs[2] = AMPP_FUNCTION(div[13], NB1_safe_q[2], !B1_reset_all, Q1L5);


--S4L17 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1584
S4L17 = AMPP_FUNCTION(S4_dffs[17], MB1_dffs[2], RB1_state[4], B1L79);


--S4_dffs[18] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[18]
S4_dffs[18] = AMPP_FUNCTION(A1L464, S4L19, !B1_reset_all);


--MB1_dffs[3] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[3]
MB1_dffs[3] = AMPP_FUNCTION(div[13], NB1_safe_q[3], !B1_reset_all, Q1L5);


--S4L18 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1585
S4L18 = AMPP_FUNCTION(S4_dffs[18], MB1_dffs[3], RB1_state[4], B1L79);


--S4_dffs[19] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[19]
S4_dffs[19] = AMPP_FUNCTION(A1L464, S4L20, !B1_reset_all);


--MB1_dffs[4] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[4]
MB1_dffs[4] = AMPP_FUNCTION(div[13], NB1_safe_q[4], !B1_reset_all, Q1L5);


--S4L19 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1586
S4L19 = AMPP_FUNCTION(S4_dffs[19], MB1_dffs[4], RB1_state[4], B1L79);


--S4_dffs[20] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[20]
S4_dffs[20] = AMPP_FUNCTION(A1L464, S4L21, !B1_reset_all);


--MB1_dffs[5] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[5]
MB1_dffs[5] = AMPP_FUNCTION(div[13], NB1_safe_q[5], !B1_reset_all, Q1L5);


--S4L20 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1587
S4L20 = AMPP_FUNCTION(S4_dffs[20], MB1_dffs[5], RB1_state[4], B1L79);


--S4_dffs[21] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[21]
S4_dffs[21] = AMPP_FUNCTION(A1L464, S4L22, !B1_reset_all);


--MB1_dffs[6] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[6]
MB1_dffs[6] = AMPP_FUNCTION(div[13], NB1_safe_q[6], !B1_reset_all, Q1L5);


--S4L21 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1588
S4L21 = AMPP_FUNCTION(S4_dffs[21], MB1_dffs[6], RB1_state[4], B1L79);


--S4_dffs[22] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[22]
S4_dffs[22] = AMPP_FUNCTION(A1L464, S4L23, !B1_reset_all);


--MB1_dffs[7] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[7]
MB1_dffs[7] = AMPP_FUNCTION(div[13], NB1_safe_q[7], !B1_reset_all, Q1L5);


--S4L22 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1589
S4L22 = AMPP_FUNCTION(S4_dffs[22], MB1_dffs[7], RB1_state[4], B1L79);


--S4_dffs[23] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[23]
S4_dffs[23] = AMPP_FUNCTION(A1L464, S4L24, !B1_reset_all);


--MB1_dffs[8] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[8]
MB1_dffs[8] = AMPP_FUNCTION(div[13], NB1_safe_q[8], !B1_reset_all, Q1L5);


--S4L23 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1590
S4L23 = AMPP_FUNCTION(S4_dffs[23], MB1_dffs[8], RB1_state[4], B1L79);


--S4_dffs[24] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[24]
S4_dffs[24] = AMPP_FUNCTION(A1L464, S4L25, !B1_reset_all);


--MB1_dffs[9] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[9]
MB1_dffs[9] = AMPP_FUNCTION(div[13], NB1_safe_q[9], !B1_reset_all, Q1L5);


--S4L24 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1591
S4L24 = AMPP_FUNCTION(S4_dffs[24], MB1_dffs[9], RB1_state[4], B1L79);


--S4_dffs[25] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[25]
S4_dffs[25] = AMPP_FUNCTION(A1L464, S4L26, !B1_reset_all);


--MB1_dffs[10] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[10]
MB1_dffs[10] = AMPP_FUNCTION(div[13], NB1_safe_q[10], !B1_reset_all, Q1L5);


--S4L25 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1592
S4L25 = AMPP_FUNCTION(S4_dffs[25], MB1_dffs[10], RB1_state[4], B1L79);


--S4_dffs[26] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[26]
S4_dffs[26] = AMPP_FUNCTION(A1L464, S4L27, !B1_reset_all);


--MB1_dffs[11] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[11]
MB1_dffs[11] = AMPP_FUNCTION(div[13], NB1_safe_q[11], !B1_reset_all, Q1L5);


--S4L26 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1593
S4L26 = AMPP_FUNCTION(S4_dffs[26], MB1_dffs[11], RB1_state[4], B1L79);


--S3_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[0]
S3_dffs[0] = AMPP_FUNCTION(A1L464, S3L4, S3_dffs[1], !B1_reset_all, L1_ram_shift_load);


--MB1_dffs[12] is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|dffs[12]
MB1_dffs[12] = AMPP_FUNCTION(div[13], NB1_safe_q[12], !B1_reset_all, Q1L5);


--S4L27 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1594
S4L27 = AMPP_FUNCTION(S3_dffs[0], MB1_dffs[12], RB1_state[4], B1L79);


--W1_ram_block2a0 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a0
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a0 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][0], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a36 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a36
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a36 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][0], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_address_reg_a[0] is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|address_reg_a[0]
W1_address_reg_a[0] = AMPP_FUNCTION(A1L464, U1_safe_q[12], PB4_Q[4]);


--S3L4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[0]~109
S3L4 = AMPP_FUNCTION(W1_ram_block2a0, W1_ram_block2a36, W1_address_reg_a[0]);


--S3_dffs[1] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[1]
S3_dffs[1] = AMPP_FUNCTION(A1L464, S3L7, S3_dffs[2], !B1_reset_all, L1_ram_shift_load);


--T1_safe_q[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|safe_q[0]
T1_safe_q[0] = AMPP_FUNCTION(A1L464, T1_counter_comb_bita0, ~GND, !L1_offload_shift_ena, T1_cout_actual);


--T1_safe_q[1] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|safe_q[1]
T1_safe_q[1] = AMPP_FUNCTION(A1L464, T1_counter_comb_bita1, ~GND, !L1_offload_shift_ena, T1_cout_actual);


--T1_safe_q[5] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|safe_q[5]
T1_safe_q[5] = AMPP_FUNCTION(A1L464, T1_counter_comb_bita5, ~GND, !L1_offload_shift_ena, T1_cout_actual);


--T1_safe_q[4] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|safe_q[4]
T1_safe_q[4] = AMPP_FUNCTION(A1L464, T1_counter_comb_bita4, ~GND, !L1_offload_shift_ena, T1_cout_actual);


--T1_safe_q[3] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|safe_q[3]
T1_safe_q[3] = AMPP_FUNCTION(A1L464, T1_counter_comb_bita3, ~GND, !L1_offload_shift_ena, T1_cout_actual);


--T1_safe_q[2] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|safe_q[2]
T1_safe_q[2] = AMPP_FUNCTION(A1L464, T1_counter_comb_bita2, ~GND, !L1_offload_shift_ena, T1_cout_actual);


--L1L3 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal~74
L1L3 = AMPP_FUNCTION(T1_safe_q[5], T1_safe_q[4], T1_safe_q[3], T1_safe_q[2]);


--L1_offload_shift_ena is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena
L1_offload_shift_ena = AMPP_FUNCTION(RB1_state[4], PB4_Q[4], B1L79);


--L1_ram_shift_load is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load
L1_ram_shift_load = AMPP_FUNCTION(T1_safe_q[0], T1_safe_q[1], L1L3, L1_offload_shift_ena);


--X2L1 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|decode_1oa:decode4|eq_node[0]~195
X2L1 = AMPP_FUNCTION(EB1L5, DB1_buffer_write_enable, S1_dffs[5], NB1_safe_q[12]);


--U1_safe_q[12] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[12]
U1_safe_q[12] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita12, !L1_acq_buf_read_reset, L1L4);


--X3_eq_node[0] is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|decode_1oa:decode_a|eq_node[0]
X3_eq_node[0] = AMPP_FUNCTION(PB4_Q[4], U1_safe_q[12]);


--U1_safe_q[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[0]
U1_safe_q[0] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita0, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[1] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[1]
U1_safe_q[1] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita1, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[2] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[2]
U1_safe_q[2] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita2, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[3] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[3]
U1_safe_q[3] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita3, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[4] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[4]
U1_safe_q[4] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita4, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[5] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[5]
U1_safe_q[5] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita5, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[6] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[6]
U1_safe_q[6] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita6, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[7] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[7]
U1_safe_q[7] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita7, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[8] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[8]
U1_safe_q[8] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita8, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[9] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[9]
U1_safe_q[9] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita9, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[10] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[10]
U1_safe_q[10] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita10, !L1_acq_buf_read_reset, L1L4);


--U1_safe_q[11] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|safe_q[11]
U1_safe_q[11] = AMPP_FUNCTION(A1L464, U1_counter_comb_bita11, !L1_acq_buf_read_reset, L1L4);


--B1_acq_data_in_pipe_reg[2][0] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][0]
B1_acq_data_in_pipe_reg[2][0] = AMPP_FUNCTION(div[13], GB36_holdff);


--X2L2 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|decode_1oa:decode4|eq_node[1]~196
X2L2 = AMPP_FUNCTION(NB1_safe_q[12], EB1L5, DB1_buffer_write_enable, S1_dffs[5]);


--X3_eq_node[1] is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|decode_1oa:decode_a|eq_node[1]
X3_eq_node[1] = AMPP_FUNCTION(PB4_Q[4], U1_safe_q[12]);


--W1_ram_block2a1 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a1
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a1 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][1], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a37 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a37
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a37 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][1], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L7 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[1]~110
S3L7 = AMPP_FUNCTION(W1_ram_block2a1, W1_ram_block2a37, W1_address_reg_a[0]);


--S3_dffs[2] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[2]
S3_dffs[2] = AMPP_FUNCTION(A1L464, S3L10, S3_dffs[3], !B1_reset_all, L1_ram_shift_load);


--T1_counter_comb_bita0 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita0
T1_counter_comb_bita0 = AMPP_FUNCTION(T1_safe_q[0], GND);

--T1L2 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita0~COUT
T1L2 = AMPP_FUNCTION(T1_safe_q[0]);


--T1_counter_comb_bita1 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita1
T1_counter_comb_bita1 = AMPP_FUNCTION(T1_safe_q[1], GND, T1L2);

--T1L4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita1~COUT
T1L4 = AMPP_FUNCTION(T1_safe_q[1], T1L2);


--T1_counter_comb_bita2 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita2
T1_counter_comb_bita2 = AMPP_FUNCTION(T1_safe_q[2], GND, T1L4);

--T1L6 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita2~COUT
T1L6 = AMPP_FUNCTION(T1_safe_q[2], T1L4);


--T1_counter_comb_bita3 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita3
T1_counter_comb_bita3 = AMPP_FUNCTION(T1_safe_q[3], GND, T1L6);

--T1L8 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita3~COUT
T1L8 = AMPP_FUNCTION(T1_safe_q[3], T1L6);


--T1_counter_comb_bita4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita4
T1_counter_comb_bita4 = AMPP_FUNCTION(T1_safe_q[4], GND, T1L8);

--T1L10 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita4~COUT
T1L10 = AMPP_FUNCTION(T1_safe_q[4], T1L8);


--T1_counter_comb_bita5 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita5
T1_counter_comb_bita5 = AMPP_FUNCTION(T1_safe_q[5], GND, T1L10);

--T1L14 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita5~COUT
T1L14 = AMPP_FUNCTION(T1_safe_q[5], T1L10);


--T1L12 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|counter_comb_bita5~9
T1L12 = AMPP_FUNCTION(T1L14);


--T1_cout_actual is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_jqa:auto_generated|cout_actual
T1_cout_actual = AMPP_FUNCTION(T1L12, T1_safe_q[0], T1_safe_q[1], L1L3);


--U1_counter_comb_bita0 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita0
U1_counter_comb_bita0 = AMPP_FUNCTION(U1_safe_q[0], GND);

--U1L2 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita0~COUT
U1L2 = AMPP_FUNCTION(U1_safe_q[0]);


--U1_counter_comb_bita1 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita1
U1_counter_comb_bita1 = AMPP_FUNCTION(U1_safe_q[1], GND, U1L2);

--U1L4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita1~COUT
U1L4 = AMPP_FUNCTION(U1_safe_q[1], U1L2);


--U1_counter_comb_bita2 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita2
U1_counter_comb_bita2 = AMPP_FUNCTION(U1_safe_q[2], GND, U1L4);

--U1L6 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita2~COUT
U1L6 = AMPP_FUNCTION(U1_safe_q[2], U1L4);


--U1_counter_comb_bita3 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita3
U1_counter_comb_bita3 = AMPP_FUNCTION(U1_safe_q[3], GND, U1L6);

--U1L8 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita3~COUT
U1L8 = AMPP_FUNCTION(U1_safe_q[3], U1L6);


--U1_counter_comb_bita4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita4
U1_counter_comb_bita4 = AMPP_FUNCTION(U1_safe_q[4], GND, U1L8);

--U1L10 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita4~COUT
U1L10 = AMPP_FUNCTION(U1_safe_q[4], U1L8);


--U1_counter_comb_bita5 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita5
U1_counter_comb_bita5 = AMPP_FUNCTION(U1_safe_q[5], GND, U1L10);

--U1L12 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita5~COUT
U1L12 = AMPP_FUNCTION(U1_safe_q[5], U1L10);


--U1_counter_comb_bita6 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita6
U1_counter_comb_bita6 = AMPP_FUNCTION(U1_safe_q[6], GND, U1L12);

--U1L14 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita6~COUT
U1L14 = AMPP_FUNCTION(U1_safe_q[6], U1L12);


--U1_counter_comb_bita7 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita7
U1_counter_comb_bita7 = AMPP_FUNCTION(U1_safe_q[7], GND, U1L14);

--U1L16 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita7~COUT
U1L16 = AMPP_FUNCTION(U1_safe_q[7], U1L14);


--U1_counter_comb_bita8 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita8
U1_counter_comb_bita8 = AMPP_FUNCTION(U1_safe_q[8], GND, U1L16);

--U1L18 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita8~COUT
U1L18 = AMPP_FUNCTION(U1_safe_q[8], U1L16);


--U1_counter_comb_bita9 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita9
U1_counter_comb_bita9 = AMPP_FUNCTION(U1_safe_q[9], GND, U1L18);

--U1L20 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita9~COUT
U1L20 = AMPP_FUNCTION(U1_safe_q[9], U1L18);


--U1_counter_comb_bita10 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita10
U1_counter_comb_bita10 = AMPP_FUNCTION(U1_safe_q[10], GND, U1L20);

--U1L22 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita10~COUT
U1L22 = AMPP_FUNCTION(U1_safe_q[10], U1L20);


--U1_counter_comb_bita11 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita11
U1_counter_comb_bita11 = AMPP_FUNCTION(U1_safe_q[11], GND, U1L22);

--U1L24 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita11~COUT
U1L24 = AMPP_FUNCTION(U1_safe_q[11], U1L22);


--U1_counter_comb_bita12 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_ojb:auto_generated|counter_comb_bita12
U1_counter_comb_bita12 = AMPP_FUNCTION(U1_safe_q[12], U1L24);


--L1L2 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~23
L1L2 = AMPP_FUNCTION(PB4_Q[1], PB4_Q[4]);


--L1_acq_buf_read_reset is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset
L1_acq_buf_read_reset = AMPP_FUNCTION(B1_reset_all, L1L2, RB1L21, B1L79);


--L1L4 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal~75
L1L4 = AMPP_FUNCTION(T1_safe_q[1], L1L3, T1_safe_q[0]);


--B1_acq_data_in_pipe_reg[2][1] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][1]
B1_acq_data_in_pipe_reg[2][1] = AMPP_FUNCTION(div[13], GB35_holdff);


--W1_ram_block2a2 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a2
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a2 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][2], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a38 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a38
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a38 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][2], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L10 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[2]~111
S3L10 = AMPP_FUNCTION(W1_ram_block2a2, W1_ram_block2a38, W1_address_reg_a[0]);


--S3_dffs[3] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[3]
S3_dffs[3] = AMPP_FUNCTION(A1L464, S3L13, S3_dffs[4], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][2] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][2]
B1_acq_data_in_pipe_reg[2][2] = AMPP_FUNCTION(div[13], GB34_holdff);


--W1_ram_block2a3 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a3
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a3 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][3], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a39 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a39
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a39 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][3], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L13 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[3]~112
S3L13 = AMPP_FUNCTION(W1_ram_block2a3, W1_ram_block2a39, W1_address_reg_a[0]);


--S3_dffs[4] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[4]
S3_dffs[4] = AMPP_FUNCTION(A1L464, S3L16, S3_dffs[5], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][3] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][3]
B1_acq_data_in_pipe_reg[2][3] = AMPP_FUNCTION(div[13], GB33_holdff);


--W1_ram_block2a4 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a4
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a4 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][4], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a40 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a40
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a40 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][4], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L16 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[4]~113
S3L16 = AMPP_FUNCTION(W1_ram_block2a4, W1_ram_block2a40, W1_address_reg_a[0]);


--S3_dffs[5] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[5]
S3_dffs[5] = AMPP_FUNCTION(A1L464, S3L19, S3_dffs[6], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][4] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][4]
B1_acq_data_in_pipe_reg[2][4] = AMPP_FUNCTION(div[13], GB32_holdff);


--W1_ram_block2a5 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a5
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a5 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][5], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a41 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a41
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a41 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][5], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L19 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[5]~114
S3L19 = AMPP_FUNCTION(W1_ram_block2a5, W1_ram_block2a41, W1_address_reg_a[0]);


--S3_dffs[6] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[6]
S3_dffs[6] = AMPP_FUNCTION(A1L464, S3L22, S3_dffs[7], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][5] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][5]
B1_acq_data_in_pipe_reg[2][5] = AMPP_FUNCTION(div[13], GB31_holdff);


--W1_ram_block2a6 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a6
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a6 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][6], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a42 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a42
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a42 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][6], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L22 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[6]~115
S3L22 = AMPP_FUNCTION(W1_ram_block2a6, W1_ram_block2a42, W1_address_reg_a[0]);


--S3_dffs[7] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[7]
S3_dffs[7] = AMPP_FUNCTION(A1L464, S3L25, S3_dffs[8], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][6] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][6]
B1_acq_data_in_pipe_reg[2][6] = AMPP_FUNCTION(div[13], GB30_holdff);


--W1_ram_block2a7 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a7
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a7 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][7], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a43 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a43
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a43 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][7], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L25 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[7]~116
S3L25 = AMPP_FUNCTION(W1_ram_block2a7, W1_ram_block2a43, W1_address_reg_a[0]);


--S3_dffs[8] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[8]
S3_dffs[8] = AMPP_FUNCTION(A1L464, S3L28, S3_dffs[9], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][7] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][7]
B1_acq_data_in_pipe_reg[2][7] = AMPP_FUNCTION(div[13], GB29_holdff);


--W1_ram_block2a8 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a8
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a8 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][8], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a44 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a44
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a44 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][8], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L28 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[8]~117
S3L28 = AMPP_FUNCTION(W1_ram_block2a8, W1_ram_block2a44, W1_address_reg_a[0]);


--S3_dffs[9] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[9]
S3_dffs[9] = AMPP_FUNCTION(A1L464, S3L31, S3_dffs[10], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][8] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][8]
B1_acq_data_in_pipe_reg[2][8] = AMPP_FUNCTION(div[13], GB28_holdff);


--W1_ram_block2a9 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a9
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a9 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][9], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a45 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a45
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a45 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][9], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L31 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[9]~118
S3L31 = AMPP_FUNCTION(W1_ram_block2a9, W1_ram_block2a45, W1_address_reg_a[0]);


--S3_dffs[10] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[10]
S3_dffs[10] = AMPP_FUNCTION(A1L464, S3L34, S3_dffs[11], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][9] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][9]
B1_acq_data_in_pipe_reg[2][9] = AMPP_FUNCTION(div[13], GB27_holdff);


--W1_ram_block2a10 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a10
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a10 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][10], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a46 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a46
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a46 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][10], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L34 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[10]~119
S3L34 = AMPP_FUNCTION(W1_ram_block2a10, W1_ram_block2a46, W1_address_reg_a[0]);


--S3_dffs[11] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[11]
S3_dffs[11] = AMPP_FUNCTION(A1L464, S3L37, S3_dffs[12], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][10] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][10]
B1_acq_data_in_pipe_reg[2][10] = AMPP_FUNCTION(div[13], GB26_holdff);


--W1_ram_block2a11 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a11
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a11 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][11], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a47 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a47
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a47 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][11], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L37 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[11]~120
S3L37 = AMPP_FUNCTION(W1_ram_block2a11, W1_ram_block2a47, W1_address_reg_a[0]);


--S3_dffs[12] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[12]
S3_dffs[12] = AMPP_FUNCTION(A1L464, S3L40, S3_dffs[13], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][11] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][11]
B1_acq_data_in_pipe_reg[2][11] = AMPP_FUNCTION(div[13], GB25_holdff);


--W1_ram_block2a12 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a12
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a12 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][12], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a48 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a48
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a48 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][12], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L40 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[12]~121
S3L40 = AMPP_FUNCTION(W1_ram_block2a12, W1_ram_block2a48, W1_address_reg_a[0]);


--S3_dffs[13] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[13]
S3_dffs[13] = AMPP_FUNCTION(A1L464, S3L43, S3_dffs[14], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][12] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][12]
B1_acq_data_in_pipe_reg[2][12] = AMPP_FUNCTION(div[13], GB24_holdff);


--W1_ram_block2a13 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a13
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a13 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][13], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a49 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a49
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a49 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][13], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L43 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[13]~122
S3L43 = AMPP_FUNCTION(W1_ram_block2a13, W1_ram_block2a49, W1_address_reg_a[0]);


--S3_dffs[14] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[14]
S3_dffs[14] = AMPP_FUNCTION(A1L464, S3L46, S3_dffs[15], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][13] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][13]
B1_acq_data_in_pipe_reg[2][13] = AMPP_FUNCTION(div[13], GB23_holdff);


--W1_ram_block2a14 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a14
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a14 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][14], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a50 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a50
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a50 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][14], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L46 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[14]~123
S3L46 = AMPP_FUNCTION(W1_ram_block2a14, W1_ram_block2a50, W1_address_reg_a[0]);


--S3_dffs[15] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[15]
S3_dffs[15] = AMPP_FUNCTION(A1L464, S3L49, S3_dffs[16], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][14] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][14]
B1_acq_data_in_pipe_reg[2][14] = AMPP_FUNCTION(div[13], GB22_holdff);


--W1_ram_block2a15 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a15
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a15 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][15], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a51 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a51
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a51 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][15], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L49 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[15]~124
S3L49 = AMPP_FUNCTION(W1_ram_block2a15, W1_ram_block2a51, W1_address_reg_a[0]);


--S3_dffs[16] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[16]
S3_dffs[16] = AMPP_FUNCTION(A1L464, S3L52, S3_dffs[17], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][15] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][15]
B1_acq_data_in_pipe_reg[2][15] = AMPP_FUNCTION(div[13], GB21_holdff);


--W1_ram_block2a16 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a16
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a16 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][16], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a52 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a52
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a52 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][16], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L52 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[16]~125
S3L52 = AMPP_FUNCTION(W1_ram_block2a16, W1_ram_block2a52, W1_address_reg_a[0]);


--S3_dffs[17] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[17]
S3_dffs[17] = AMPP_FUNCTION(A1L464, S3L55, S3_dffs[18], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][16] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][16]
B1_acq_data_in_pipe_reg[2][16] = AMPP_FUNCTION(div[13], GB20_holdff);


--W1_ram_block2a17 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a17
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a17 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][17], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a53 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a53
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a53 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][17], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L55 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[17]~126
S3L55 = AMPP_FUNCTION(W1_ram_block2a17, W1_ram_block2a53, W1_address_reg_a[0]);


--S3_dffs[18] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[18]
S3_dffs[18] = AMPP_FUNCTION(A1L464, S3L58, S3_dffs[19], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][17] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][17]
B1_acq_data_in_pipe_reg[2][17] = AMPP_FUNCTION(div[13], GB19_holdff);


--W1_ram_block2a18 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a18
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a18 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][18], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a54 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a54
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a54 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][18], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L58 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[18]~127
S3L58 = AMPP_FUNCTION(W1_ram_block2a18, W1_ram_block2a54, W1_address_reg_a[0]);


--S3_dffs[19] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[19]
S3_dffs[19] = AMPP_FUNCTION(A1L464, S3L61, S3_dffs[20], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][18] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][18]
B1_acq_data_in_pipe_reg[2][18] = AMPP_FUNCTION(div[13], GB18_holdff);


--W1_ram_block2a19 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a19
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a19 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][19], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a55 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a55
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a55 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][19], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L61 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[19]~128
S3L61 = AMPP_FUNCTION(W1_ram_block2a19, W1_ram_block2a55, W1_address_reg_a[0]);


--S3_dffs[20] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[20]
S3_dffs[20] = AMPP_FUNCTION(A1L464, S3L64, S3_dffs[21], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][19] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][19]
B1_acq_data_in_pipe_reg[2][19] = AMPP_FUNCTION(div[13], GB17_holdff);


--W1_ram_block2a20 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a20
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a20 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][20], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a56 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a56
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a56 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][20], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L64 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[20]~129
S3L64 = AMPP_FUNCTION(W1_ram_block2a20, W1_ram_block2a56, W1_address_reg_a[0]);


--S3_dffs[21] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[21]
S3_dffs[21] = AMPP_FUNCTION(A1L464, S3L67, S3_dffs[22], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][20] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][20]
B1_acq_data_in_pipe_reg[2][20] = AMPP_FUNCTION(div[13], GB16_holdff);


--W1_ram_block2a21 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a21
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a21 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][21], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a57 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a57
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a57 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][21], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L67 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[21]~130
S3L67 = AMPP_FUNCTION(W1_ram_block2a21, W1_ram_block2a57, W1_address_reg_a[0]);


--S3_dffs[22] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[22]
S3_dffs[22] = AMPP_FUNCTION(A1L464, S3L70, S3_dffs[23], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][21] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][21]
B1_acq_data_in_pipe_reg[2][21] = AMPP_FUNCTION(div[13], GB15_holdff);


--W1_ram_block2a22 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a22
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a22 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][22], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a58 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a58
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a58 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][22], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L70 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[22]~131
S3L70 = AMPP_FUNCTION(W1_ram_block2a22, W1_ram_block2a58, W1_address_reg_a[0]);


--S3_dffs[23] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[23]
S3_dffs[23] = AMPP_FUNCTION(A1L464, S3L73, S3_dffs[24], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][22] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][22]
B1_acq_data_in_pipe_reg[2][22] = AMPP_FUNCTION(div[13], GB14_holdff);


--W1_ram_block2a23 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a23
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a23 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][23], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a59 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a59
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a59 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][23], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L73 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[23]~132
S3L73 = AMPP_FUNCTION(W1_ram_block2a23, W1_ram_block2a59, W1_address_reg_a[0]);


--S3_dffs[24] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[24]
S3_dffs[24] = AMPP_FUNCTION(A1L464, S3L76, S3_dffs[25], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][23] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][23]
B1_acq_data_in_pipe_reg[2][23] = AMPP_FUNCTION(div[13], GB13_holdff);


--W1_ram_block2a24 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a24
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a24 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][24], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a60 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a60
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a60 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][24], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L76 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[24]~133
S3L76 = AMPP_FUNCTION(W1_ram_block2a24, W1_ram_block2a60, W1_address_reg_a[0]);


--S3_dffs[25] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[25]
S3_dffs[25] = AMPP_FUNCTION(A1L464, S3L79, S3_dffs[26], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][24] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][24]
B1_acq_data_in_pipe_reg[2][24] = AMPP_FUNCTION(div[13], GB12_holdff);


--W1_ram_block2a25 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a25
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a25 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][25], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a61 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a61
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a61 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][25], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L79 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[25]~134
S3L79 = AMPP_FUNCTION(W1_ram_block2a25, W1_ram_block2a61, W1_address_reg_a[0]);


--S3_dffs[26] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[26]
S3_dffs[26] = AMPP_FUNCTION(A1L464, S3L82, S3_dffs[27], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][25] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][25]
B1_acq_data_in_pipe_reg[2][25] = AMPP_FUNCTION(div[13], GB11_holdff);


--W1_ram_block2a26 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a26
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a26 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][26], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a62 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a62
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a62 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][26], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L82 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[26]~135
S3L82 = AMPP_FUNCTION(W1_ram_block2a26, W1_ram_block2a62, W1_address_reg_a[0]);


--S3_dffs[27] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[27]
S3_dffs[27] = AMPP_FUNCTION(A1L464, S3L85, S3_dffs[28], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][26] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][26]
B1_acq_data_in_pipe_reg[2][26] = AMPP_FUNCTION(div[13], GB10_holdff);


--W1_ram_block2a27 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a27
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a27 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][27], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a63 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a63
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a63 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][27], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L85 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[27]~136
S3L85 = AMPP_FUNCTION(W1_ram_block2a27, W1_ram_block2a63, W1_address_reg_a[0]);


--S3_dffs[28] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[28]
S3_dffs[28] = AMPP_FUNCTION(A1L464, S3L88, S3_dffs[29], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][27] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][27]
B1_acq_data_in_pipe_reg[2][27] = AMPP_FUNCTION(div[13], GB9_holdff);


--W1_ram_block2a28 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a28
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a28 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][28], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a64 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a64
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a64 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][28], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L88 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[28]~137
S3L88 = AMPP_FUNCTION(W1_ram_block2a28, W1_ram_block2a64, W1_address_reg_a[0]);


--S3_dffs[29] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[29]
S3_dffs[29] = AMPP_FUNCTION(A1L464, S3L91, S3_dffs[30], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][28] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][28]
B1_acq_data_in_pipe_reg[2][28] = AMPP_FUNCTION(div[13], GB8_holdff);


--W1_ram_block2a29 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a29
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a29 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][29], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a65 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a65
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a65 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][29], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L91 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[29]~138
S3L91 = AMPP_FUNCTION(W1_ram_block2a29, W1_ram_block2a65, W1_address_reg_a[0]);


--S3_dffs[30] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[30]
S3_dffs[30] = AMPP_FUNCTION(A1L464, S3L94, S3_dffs[31], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][29] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][29]
B1_acq_data_in_pipe_reg[2][29] = AMPP_FUNCTION(div[13], GB7_holdff);


--W1_ram_block2a30 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a30
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a30 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][30], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a66 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a66
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a66 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][30], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L94 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[30]~139
S3L94 = AMPP_FUNCTION(W1_ram_block2a30, W1_ram_block2a66, W1_address_reg_a[0]);


--S3_dffs[31] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[31]
S3_dffs[31] = AMPP_FUNCTION(A1L464, S3L97, S3_dffs[32], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][30] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][30]
B1_acq_data_in_pipe_reg[2][30] = AMPP_FUNCTION(div[13], GB6_holdff);


--W1_ram_block2a31 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a31
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a31 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][31], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a67 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a67
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a67 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][31], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L97 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[31]~140
S3L97 = AMPP_FUNCTION(W1_ram_block2a31, W1_ram_block2a67, W1_address_reg_a[0]);


--S3_dffs[32] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[32]
S3_dffs[32] = AMPP_FUNCTION(A1L464, S3L100, S3_dffs[33], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][31] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][31]
B1_acq_data_in_pipe_reg[2][31] = AMPP_FUNCTION(div[13], GB5_holdff);


--W1_ram_block2a32 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a32
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a32 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][32], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a68 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a68
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a68 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][32], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L100 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[32]~141
S3L100 = AMPP_FUNCTION(W1_ram_block2a32, W1_ram_block2a68, W1_address_reg_a[0]);


--S3_dffs[33] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[33]
S3_dffs[33] = AMPP_FUNCTION(A1L464, S3L103, S3_dffs[34], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][32] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][32]
B1_acq_data_in_pipe_reg[2][32] = AMPP_FUNCTION(div[13], GB4_holdff);


--W1_ram_block2a33 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a33
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a33 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][33], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a69 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a69
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a69 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][33], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L103 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[33]~142
S3L103 = AMPP_FUNCTION(W1_ram_block2a33, W1_ram_block2a69, W1_address_reg_a[0]);


--S3_dffs[34] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[34]
S3_dffs[34] = AMPP_FUNCTION(A1L464, S3L106, S3_dffs[35], !B1_reset_all, L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][33] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][33]
B1_acq_data_in_pipe_reg[2][33] = AMPP_FUNCTION(div[13], GB3_holdff);


--W1_ram_block2a34 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a34
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a34 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][34], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a70 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a70
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a70 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][34], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L106 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[34]~143
S3L106 = AMPP_FUNCTION(W1_ram_block2a34, W1_ram_block2a70, W1_address_reg_a[0]);


--S3_dffs[35] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[35]
S3_dffs[35] = AMPP_FUNCTION(A1L464, S3L1, !B1_reset_all);


--B1_acq_data_in_pipe_reg[2][34] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][34]
B1_acq_data_in_pipe_reg[2][34] = AMPP_FUNCTION(div[13], GB2_holdff);


--W1_ram_block2a71 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a71
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a71 = AMPP_FUNCTION(VCC, X2L2, A1L464, div[13], X3_eq_node[1], X2L2, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][35], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--W1_ram_block2a35 is sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_qrb2:auto_generated|altsyncram_gcc1:altsyncram1|ram_block2a35
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 4096, Port A Width: 1, Port B Depth: 4096, Port B Width: 1
--Port A Logical Depth: 8192, Port A Logical Width: 36, Port B Logical Depth: 8192, Port B Logical Width: 36
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
W1_ram_block2a35 = AMPP_FUNCTION(VCC, X2L1, A1L464, div[13], X3_eq_node[0], X2L1, GND, U1_safe_q[0], U1_safe_q[1], U1_safe_q[2], U1_safe_q[3], U1_safe_q[4], U1_safe_q[5], U1_safe_q[6], U1_safe_q[7], U1_safe_q[8], U1_safe_q[9], U1_safe_q[10], U1_safe_q[11], B1_acq_data_in_pipe_reg[2][35], NB1_safe_q[0], NB1_safe_q[1], NB1_safe_q[2], NB1_safe_q[3], NB1_safe_q[4], NB1_safe_q[5], NB1_safe_q[6], NB1_safe_q[7], NB1_safe_q[8], NB1_safe_q[9], NB1_safe_q[10], NB1_safe_q[11]);


--S3L1 is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~74
S3L1 = AMPP_FUNCTION(W1_ram_block2a71, W1_ram_block2a35, W1_address_reg_a[0], L1_ram_shift_load);


--B1_acq_data_in_pipe_reg[2][35] is sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][35]
B1_acq_data_in_pipe_reg[2][35] = AMPP_FUNCTION(div[13], GB1_holdff);


--K1L132 is touch_spi:u11|my_coordinate[0]~23
K1L132 = K1L7 & K1L117 & K1L119 & K1L191Q;


--K1L116 is touch_spi:u11|mx_coordinate[0]~23
K1L116 = K1L7 & K1L117 & K1L119 & !K1L191Q;


--C1L21 is sld_hub:sld_hub_inst|hub_tdo~765
C1L21 = AMPP_FUNCTION(RB1_state[3], RB1_state[4], C1L20, C1_hub_tdo);


--H1L18 is Touch_Panel_Tining:u7|Equal~328
H1L18 = !H1L44Q & !H1L43Q & H1L12;


--PB3L5 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~211
PB3L5 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, RB1_state[3], RB1_state[4], PB3L3);


--N2L23 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[1]~1221
N2L23 = AMPP_FUNCTION(RB1_state[3], RB1_state[4], C1_jtag_debug_mode_usr0, N2_clear_signal);


--N1L12 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter~439
N1L12 = AMPP_FUNCTION(N1_word_counter[1], N1_word_counter[0], N1L5, N1_word_counter[2]);


--N1L13 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter~440
N1L13 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, RB1_state[8], N1_word_counter[1], N1_word_counter[0]);


--N2L7 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]~694
N2L7 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, RB1_state[8], N2_word_counter[4], N2L27);


--UB1L43 is I2C_AV_Config:u2|I2C_Controller:u0|SD[22]~1
UB1L43 = UB1L63Q & !UB1L48Q & J1_oRST_0 & UB1L44;


--Q1L5 is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|trigger_write_addr_latch_ena~51
Q1L5 = AMPP_FUNCTION(EB1_status_out[1], DB1_buffer_write_enable, S1_dffs[5], P1L2);


--E1L201 is I2C_AV_Config:u2|reduce_or~1907
E1L201 = E1_LUT_INDEX[5] & !E1L192 & (!E1_LUT_INDEX[1] # !E1_LUT_INDEX[4]) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[4] $ (!E1L192 & !E1_LUT_INDEX[1]));


--E1L202 is I2C_AV_Config:u2|reduce_or~1908
E1L202 = E1_LUT_INDEX[5] & (E1L191 & (!E1_LUT_INDEX[4]) # !E1L191 & E1L201) # !E1_LUT_INDEX[5] & E1L201 & (E1L191);


--E1L203 is I2C_AV_Config:u2|reduce_or~1909
E1L203 = E1_LUT_INDEX[5] & (E1_LUT_INDEX[1] & (E1L135) # !E1_LUT_INDEX[1] & !E1L136) # !E1_LUT_INDEX[5] & (E1_LUT_INDEX[1] & E1L136 # !E1_LUT_INDEX[1] & (E1L135));


--E1L204 is I2C_AV_Config:u2|reduce_or~1910
E1L204 = E1L136 & (E1_LUT_INDEX[3] & E1L203 # !E1_LUT_INDEX[3] & (E1L135)) # !E1L136 & E1L203 & (E1L135 $ !E1_LUT_INDEX[3]);


--GB2L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~206
GB2L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[34], S2_dffs[104], S2_dffs[103], S2_dffs[102]);


--GB2L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~207
GB2L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[34], GB2L2, S2_dffs[104], GB2_holdff);


--GB4L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~206
GB4L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[32], S2_dffs[98], S2_dffs[97], S2_dffs[96]);


--GB4L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~207
GB4L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[32], GB4L2, S2_dffs[98], GB4_holdff);


--GB5L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~206
GB5L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[31], S2_dffs[95], S2_dffs[94], S2_dffs[93]);


--GB5L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~207
GB5L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[31], GB5L2, S2_dffs[95], GB5_holdff);


--GB6L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~206
GB6L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[30], S2_dffs[92], S2_dffs[91], S2_dffs[90]);


--GB6L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~207
GB6L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[30], GB6L2, S2_dffs[92], GB6_holdff);


--GB3L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~206
GB3L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[33], S2_dffs[101], S2_dffs[100], S2_dffs[99]);


--GB3L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~207
GB3L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[33], GB3L2, S2_dffs[101], GB3_holdff);


--GB7L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~206
GB7L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[29], S2_dffs[89], S2_dffs[88], S2_dffs[87]);


--GB7L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~207
GB7L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[29], GB7L2, S2_dffs[89], GB7_holdff);


--GB8L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~206
GB8L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[28], S2_dffs[86], S2_dffs[85], S2_dffs[84]);


--GB8L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~207
GB8L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[28], GB8L2, S2_dffs[86], GB8_holdff);


--GB9L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~206
GB9L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[27], S2_dffs[83], S2_dffs[82], S2_dffs[81]);


--GB9L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~207
GB9L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[27], GB9L2, S2_dffs[83], GB9_holdff);


--GB10L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~206
GB10L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[26], S2_dffs[80], S2_dffs[79], S2_dffs[78]);


--GB10L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~207
GB10L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[26], GB10L2, S2_dffs[80], GB10_holdff);


--GB11L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~206
GB11L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[25], S2_dffs[77], S2_dffs[76], S2_dffs[75]);


--GB11L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~207
GB11L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[25], GB11L2, S2_dffs[77], GB11_holdff);


--GB12L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~206
GB12L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[24], S2_dffs[74], S2_dffs[73], S2_dffs[72]);


--GB12L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~207
GB12L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[24], GB12L2, S2_dffs[74], GB12_holdff);


--GB13L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~206
GB13L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[23], S2_dffs[71], S2_dffs[70], S2_dffs[69]);


--GB13L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~207
GB13L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[23], GB13L2, S2_dffs[71], GB13_holdff);


--GB14L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~206
GB14L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[22], S2_dffs[68], S2_dffs[67], S2_dffs[66]);


--GB14L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~207
GB14L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[22], GB14L2, S2_dffs[68], GB14_holdff);


--GB15L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~206
GB15L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[21], S2_dffs[65], S2_dffs[64], S2_dffs[63]);


--GB15L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~207
GB15L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[21], GB15L2, S2_dffs[65], GB15_holdff);


--GB16L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~206
GB16L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[20], S2_dffs[62], S2_dffs[61], S2_dffs[60]);


--GB16L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~207
GB16L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[20], GB16L2, S2_dffs[62], GB16_holdff);


--GB17L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~206
GB17L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[19], S2_dffs[59], S2_dffs[58], S2_dffs[57]);


--GB17L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~207
GB17L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[19], GB17L2, S2_dffs[59], GB17_holdff);


--GB18L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~206
GB18L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[18], S2_dffs[56], S2_dffs[55], S2_dffs[54]);


--GB18L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~207
GB18L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[18], GB18L2, S2_dffs[56], GB18_holdff);


--GB19L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~206
GB19L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[17], S2_dffs[53], S2_dffs[52], S2_dffs[51]);


--GB19L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~207
GB19L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[17], GB19L2, S2_dffs[53], GB19_holdff);


--GB20L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~206
GB20L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[16], S2_dffs[50], S2_dffs[49], S2_dffs[48]);


--GB20L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~207
GB20L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[16], GB20L2, S2_dffs[50], GB20_holdff);


--GB21L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~206
GB21L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[15], S2_dffs[47], S2_dffs[46], S2_dffs[45]);


--GB21L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~207
GB21L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[15], GB21L2, S2_dffs[47], GB21_holdff);


--GB22L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~206
GB22L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[14], S2_dffs[44], S2_dffs[43], S2_dffs[42]);


--GB22L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~207
GB22L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[14], GB22L2, S2_dffs[44], GB22_holdff);


--GB23L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~206
GB23L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[13], S2_dffs[41], S2_dffs[40], S2_dffs[39]);


--GB23L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~207
GB23L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[13], GB23L2, S2_dffs[41], GB23_holdff);


--GB24L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~206
GB24L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[12], S2_dffs[38], S2_dffs[37], S2_dffs[36]);


--GB24L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~207
GB24L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[12], GB24L2, S2_dffs[38], GB24_holdff);


--GB25L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~206
GB25L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[11], S2_dffs[35], S2_dffs[34], S2_dffs[33]);


--GB25L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~207
GB25L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[11], GB25L2, S2_dffs[35], GB25_holdff);


--GB26L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~206
GB26L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[10], S2_dffs[32], S2_dffs[31], S2_dffs[30]);


--GB26L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~207
GB26L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[10], GB26L2, S2_dffs[32], GB26_holdff);


--GB27L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~206
GB27L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[9], S2_dffs[29], S2_dffs[28], S2_dffs[27]);


--GB27L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~207
GB27L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[9], GB27L2, S2_dffs[29], GB27_holdff);


--GB28L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~206
GB28L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[8], S2_dffs[26], S2_dffs[25], S2_dffs[24]);


--GB28L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~207
GB28L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[8], GB28L2, S2_dffs[26], GB28_holdff);


--GB29L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~206
GB29L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[7], S2_dffs[23], S2_dffs[22], S2_dffs[21]);


--GB29L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~207
GB29L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[7], GB29L2, S2_dffs[23], GB29_holdff);


--GB30L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~206
GB30L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[6], S2_dffs[20], S2_dffs[19], S2_dffs[18]);


--GB30L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~207
GB30L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[6], GB30L2, S2_dffs[20], GB30_holdff);


--GB31L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~206
GB31L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[5], S2_dffs[17], S2_dffs[16], S2_dffs[15]);


--GB31L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~207
GB31L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[5], GB31L2, S2_dffs[17], GB31_holdff);


--GB32L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~206
GB32L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[4], S2_dffs[14], S2_dffs[13], S2_dffs[12]);


--GB32L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~207
GB32L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[4], GB32L2, S2_dffs[14], GB32_holdff);


--GB33L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~206
GB33L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[3], S2_dffs[11], S2_dffs[10], S2_dffs[9]);


--GB33L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~207
GB33L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[3], GB33L2, S2_dffs[11], GB33_holdff);


--GB34L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~206
GB34L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[2], S2_dffs[8], S2_dffs[7], S2_dffs[6]);


--GB34L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~207
GB34L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[2], GB34L2, S2_dffs[8], GB34_holdff);


--GB35L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~206
GB35L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[1], S2_dffs[5], S2_dffs[4], S2_dffs[3]);


--GB35L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~207
GB35L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[1], GB35L2, S2_dffs[5], GB35_holdff);


--GB36L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~206
GB36L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[0], S2_dffs[2], S2_dffs[1], S2_dffs[0]);


--GB36L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~207
GB36L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[0], GB36L2, S2_dffs[2], GB36_holdff);


--GB1L2 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~209
GB1L2 = AMPP_FUNCTION(B1_acq_trigger_in_reg[35], S2_dffs[107], S2_dffs[106], S2_dffs[105]);


--GB1L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~210
GB1L3 = AMPP_FUNCTION(B1_acq_trigger_in_reg[35], GB1L2, S2_dffs[107], GB1_holdff);


--PB7L3 is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]~3
PB7L3 = AMPP_FUNCTION(altera_internal_jtag);


--D1L2 is I2S_LCM_Config:u1|I2S_BUSY_n~2
D1L2 = !D1L44;


--B1L50 is sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[10]~216
B1L50 = AMPP_FUNCTION(K1_oADC_CS);


--D1L68 is I2S_LCM_Config:u1|mSetup_ST.0001~6
D1L68 = !D1_mSetup_ST.0000;


--K1L100 is touch_spi:u11|mdata_in[1]~570
K1L100 = !K1_mdclk;


--E1_LUT_DATA[2] is I2C_AV_Config:u2|LUT_DATA[2]
E1_LUT_DATA[2] = E1L134 & (E1_LUT_DATA[2]) # !E1L134 & E1L132;


--E1_LUT_DATA[8] is I2C_AV_Config:u2|LUT_DATA[8]
E1_LUT_DATA[8] = E1L134 & (E1_LUT_DATA[8]) # !E1L134 & E1L204;


--E1_LUT_DATA[9] is I2C_AV_Config:u2|LUT_DATA[9]
E1_LUT_DATA[9] = E1L134 & (E1_LUT_DATA[9]) # !E1L134 & E1L141;


--E1_LUT_DATA[1] is I2C_AV_Config:u2|LUT_DATA[1]
E1_LUT_DATA[1] = E1L134 & (E1_LUT_DATA[1]) # !E1L134 & E1L146;


--E1_LUT_DATA[7] is I2C_AV_Config:u2|LUT_DATA[7]
E1_LUT_DATA[7] = E1L134 & (E1_LUT_DATA[7]) # !E1L134 & E1L152;


--E1_LUT_DATA[0] is I2C_AV_Config:u2|LUT_DATA[0]
E1_LUT_DATA[0] = E1L134 & (E1_LUT_DATA[0]) # !E1L134 & E1L157;


--E1_LUT_DATA[10] is I2C_AV_Config:u2|LUT_DATA[10]
E1_LUT_DATA[10] = E1L134 & (E1_LUT_DATA[10]) # !E1L134 & E1L162;


--E1_LUT_DATA[4] is I2C_AV_Config:u2|LUT_DATA[4]
E1_LUT_DATA[4] = E1L134 & (E1_LUT_DATA[4]) # !E1L134 & E1L167;


--E1_LUT_DATA[11] is I2C_AV_Config:u2|LUT_DATA[11]
E1_LUT_DATA[11] = E1L134 & (E1_LUT_DATA[11]) # !E1L134 & E1L172;


--E1_LUT_DATA[3] is I2C_AV_Config:u2|LUT_DATA[3]
E1_LUT_DATA[3] = E1L134 & (E1_LUT_DATA[3]) # !E1L134 & E1L177;


--E1_LUT_DATA[6] is I2C_AV_Config:u2|LUT_DATA[6]
E1_LUT_DATA[6] = E1L134 & (E1_LUT_DATA[6]) # !E1L134 & E1L182;


--E1_LUT_DATA[5] is I2C_AV_Config:u2|LUT_DATA[5]
E1_LUT_DATA[5] = E1L134 & (E1_LUT_DATA[5]) # !E1L134 & E1L187;


--E1_LUT_DATA[15] is I2C_AV_Config:u2|LUT_DATA[15]
E1_LUT_DATA[15] = E1L134 & (E1_LUT_DATA[15]) # !E1L134 & E1L190;


--E1_LUT_DATA[13] is I2C_AV_Config:u2|LUT_DATA[13]
E1_LUT_DATA[13] = E1L134 & (E1_LUT_DATA[13]) # !E1L134 & E1L202;


--E1_LUT_DATA[14] is I2C_AV_Config:u2|LUT_DATA[14]
E1_LUT_DATA[14] = E1L134 & (E1_LUT_DATA[14]) # !E1L134 & E1L195;


--E1_LUT_DATA[12] is I2C_AV_Config:u2|LUT_DATA[12]
E1_LUT_DATA[12] = E1L134 & (E1_LUT_DATA[12]) # !E1L134 & E1L200;


--~GND is ~GND
~GND = GND;


--EXT_CLOCK is EXT_CLOCK
--operation mode is input

EXT_CLOCK = INPUT();


--KEY[1] is KEY[1]
--operation mode is input

KEY[1] = INPUT();


--KEY[3] is KEY[3]
--operation mode is input

KEY[3] = INPUT();


--SW[0] is SW[0]
--operation mode is input

SW[0] = INPUT();


--SW[1] is SW[1]
--operation mode is input

SW[1] = INPUT();


--SW[2] is SW[2]
--operation mode is input

SW[2] = INPUT();


--SW[3] is SW[3]
--operation mode is input

SW[3] = INPUT();


--SW[4] is SW[4]
--operation mode is input

SW[4] = INPUT();


--SW[5] is SW[5]
--operation mode is input

SW[5] = INPUT();


--SW[6] is SW[6]
--operation mode is input

SW[6] = INPUT();


--SW[7] is SW[7]
--operation mode is input

SW[7] = INPUT();


--SW[8] is SW[8]
--operation mode is input

SW[8] = INPUT();


--SW[9] is SW[9]
--operation mode is input

SW[9] = INPUT();


--SW[10] is SW[10]
--operation mode is input

SW[10] = INPUT();


--SW[11] is SW[11]
--operation mode is input

SW[11] = INPUT();


--SW[12] is SW[12]
--operation mode is input

SW[12] = INPUT();


--SW[13] is SW[13]
--operation mode is input

SW[13] = INPUT();


--SW[14] is SW[14]
--operation mode is input

SW[14] = INPUT();


--SW[15] is SW[15]
--operation mode is input

SW[15] = INPUT();


--SW[16] is SW[16]
--operation mode is input

SW[16] = INPUT();


--SW[17] is SW[17]
--operation mode is input

SW[17] = INPUT();


--UART_RXD is UART_RXD
--operation mode is input

UART_RXD = INPUT();


--IRDA_RXD is IRDA_RXD
--operation mode is input

IRDA_RXD = INPUT();


--OTG_INT0 is OTG_INT0
--operation mode is input

OTG_INT0 = INPUT();


--OTG_INT1 is OTG_INT1
--operation mode is input

OTG_INT1 = INPUT();


--OTG_DREQ0 is OTG_DREQ0
--operation mode is input

OTG_DREQ0 = INPUT();


--OTG_DREQ1 is OTG_DREQ1
--operation mode is input

OTG_DREQ1 = INPUT();


--TDI is TDI
--operation mode is input

TDI = INPUT();


--TCK is TCK
--operation mode is input

TCK = INPUT();


--TCS is TCS
--operation mode is input

TCS = INPUT();


--PS2_DAT is PS2_DAT
--operation mode is input

PS2_DAT = INPUT();


--PS2_CLK is PS2_CLK
--operation mode is input

PS2_CLK = INPUT();


--ENET_INT is ENET_INT
--operation mode is input

ENET_INT = INPUT();


--AUD_ADCDAT is AUD_ADCDAT
--operation mode is input

AUD_ADCDAT = INPUT();


--TD_DATA[0] is TD_DATA[0]
--operation mode is input

TD_DATA[0] = INPUT();


--TD_DATA[1] is TD_DATA[1]
--operation mode is input

TD_DATA[1] = INPUT();


--TD_DATA[2] is TD_DATA[2]
--operation mode is input

TD_DATA[2] = INPUT();


--TD_DATA[3] is TD_DATA[3]
--operation mode is input

TD_DATA[3] = INPUT();


--TD_DATA[4] is TD_DATA[4]
--operation mode is input

TD_DATA[4] = INPUT();


--TD_DATA[5] is TD_DATA[5]
--operation mode is input

TD_DATA[5] = INPUT();


--TD_DATA[6] is TD_DATA[6]
--operation mode is input

TD_DATA[6] = INPUT();


--TD_DATA[7] is TD_DATA[7]
--operation mode is input

TD_DATA[7] = INPUT();


--TD_HS is TD_HS
--operation mode is input

TD_HS = INPUT();


--TD_VS is TD_VS
--operation mode is input

TD_VS = INPUT();


--KEY[0] is KEY[0]
--operation mode is input

KEY[0] = INPUT();


--CLOCK_50 is CLOCK_50
--operation mode is input

CLOCK_50 = INPUT();





--CLOCK_27 is CLOCK_27
--operation mode is input

CLOCK_27 = INPUT();


--KEY[2] is KEY[2]
--operation mode is input

KEY[2] = INPUT();


--HEX0[0] is HEX0[0]
--operation mode is output

HEX0[0] = OUTPUT(WB1L1);


--HEX0[1] is HEX0[1]
--operation mode is output

HEX0[1] = OUTPUT(WB1L2);


--HEX0[2] is HEX0[2]
--operation mode is output

HEX0[2] = OUTPUT(WB1L3);


--HEX0[3] is HEX0[3]
--operation mode is output

HEX0[3] = OUTPUT(WB1L4);


--HEX0[4] is HEX0[4]
--operation mode is output

HEX0[4] = OUTPUT(WB1L5);


--HEX0[5] is HEX0[5]
--operation mode is output

HEX0[5] = OUTPUT(WB1L6);


--HEX0[6] is HEX0[6]
--operation mode is output

HEX0[6] = OUTPUT(!WB1L7);


--HEX1[0] is HEX1[0]
--operation mode is output

HEX1[0] = OUTPUT(WB2L1);


--HEX1[1] is HEX1[1]
--operation mode is output

HEX1[1] = OUTPUT(WB2L2);


--HEX1[2] is HEX1[2]
--operation mode is output

HEX1[2] = OUTPUT(WB2L3);


--HEX1[3] is HEX1[3]
--operation mode is output

HEX1[3] = OUTPUT(WB2L4);


--HEX1[4] is HEX1[4]
--operation mode is output

HEX1[4] = OUTPUT(WB2L5);


--HEX1[5] is HEX1[5]
--operation mode is output

HEX1[5] = OUTPUT(WB2L6);


--HEX1[6] is HEX1[6]
--operation mode is output

HEX1[6] = OUTPUT(!WB2L7);


--HEX2[0] is HEX2[0]
--operation mode is output

HEX2[0] = OUTPUT(WB3L1);


--HEX2[1] is HEX2[1]
--operation mode is output

HEX2[1] = OUTPUT(WB3L2);


--HEX2[2] is HEX2[2]
--operation mode is output

HEX2[2] = OUTPUT(WB3L3);


--HEX2[3] is HEX2[3]
--operation mode is output

HEX2[3] = OUTPUT(WB3L4);


--HEX2[4] is HEX2[4]
--operation mode is output

HEX2[4] = OUTPUT(WB3L5);


--HEX2[5] is HEX2[5]
--operation mode is output

HEX2[5] = OUTPUT(WB3L6);


--HEX2[6] is HEX2[6]
--operation mode is output

HEX2[6] = OUTPUT(!WB3L7);


--HEX3[0] is HEX3[0]
--operation mode is output

HEX3[0] = OUTPUT(VCC);


--HEX3[1] is HEX3[1]
--operation mode is output

HEX3[1] = OUTPUT(VCC);


--HEX3[2] is HEX3[2]
--operation mode is output

HEX3[2] = OUTPUT(VCC);


--HEX3[3] is HEX3[3]
--operation mode is output

HEX3[3] = OUTPUT(VCC);


--HEX3[4] is HEX3[4]
--operation mode is output

HEX3[4] = OUTPUT(VCC);


--HEX3[5] is HEX3[5]
--operation mode is output

HEX3[5] = OUTPUT(VCC);


--HEX3[6] is HEX3[6]
--operation mode is output

HEX3[6] = OUTPUT(VCC);


--HEX4[0] is HEX4[0]
--operation mode is output

HEX4[0] = OUTPUT(WB5L1);


--HEX4[1] is HEX4[1]
--operation mode is output

HEX4[1] = OUTPUT(WB5L2);


--HEX4[2] is HEX4[2]
--operation mode is output

HEX4[2] = OUTPUT(WB5L3);


--HEX4[3] is HEX4[3]
--operation mode is output

HEX4[3] = OUTPUT(WB5L4);


--HEX4[4] is HEX4[4]
--operation mode is output

HEX4[4] = OUTPUT(WB5L5);


--HEX4[5] is HEX4[5]
--operation mode is output

HEX4[5] = OUTPUT(WB5L6);


--HEX4[6] is HEX4[6]
--operation mode is output

HEX4[6] = OUTPUT(!WB5L7);


--HEX5[0] is HEX5[0]
--operation mode is output

HEX5[0] = OUTPUT(WB6L1);


--HEX5[1] is HEX5[1]
--operation mode is output

HEX5[1] = OUTPUT(WB6L2);


--HEX5[2] is HEX5[2]
--operation mode is output

HEX5[2] = OUTPUT(WB6L3);


--HEX5[3] is HEX5[3]
--operation mode is output

HEX5[3] = OUTPUT(WB6L4);


--HEX5[4] is HEX5[4]
--operation mode is output

HEX5[4] = OUTPUT(WB6L5);


--HEX5[5] is HEX5[5]
--operation mode is output

HEX5[5] = OUTPUT(WB6L6);


--HEX5[6] is HEX5[6]
--operation mode is output

HEX5[6] = OUTPUT(!WB6L7);


--HEX6[0] is HEX6[0]
--operation mode is output

HEX6[0] = OUTPUT(WB7L1);


--HEX6[1] is HEX6[1]
--operation mode is output

HEX6[1] = OUTPUT(WB7L2);


--HEX6[2] is HEX6[2]
--operation mode is output

HEX6[2] = OUTPUT(WB7L3);


--HEX6[3] is HEX6[3]
--operation mode is output

HEX6[3] = OUTPUT(WB7L4);


--HEX6[4] is HEX6[4]
--operation mode is output

HEX6[4] = OUTPUT(WB7L5);


--HEX6[5] is HEX6[5]
--operation mode is output

HEX6[5] = OUTPUT(WB7L6);


--HEX6[6] is HEX6[6]
--operation mode is output

HEX6[6] = OUTPUT(!WB7L7);


--HEX7[0] is HEX7[0]
--operation mode is output

HEX7[0] = OUTPUT(VCC);


--HEX7[1] is HEX7[1]
--operation mode is output

HEX7[1] = OUTPUT(VCC);


--HEX7[2] is HEX7[2]
--operation mode is output

HEX7[2] = OUTPUT(VCC);


--HEX7[3] is HEX7[3]
--operation mode is output

HEX7[3] = OUTPUT(VCC);


--HEX7[4] is HEX7[4]
--operation mode is output

HEX7[4] = OUTPUT(VCC);


--HEX7[5] is HEX7[5]
--operation mode is output

HEX7[5] = OUTPUT(VCC);


--HEX7[6] is HEX7[6]
--operation mode is output

HEX7[6] = OUTPUT(VCC);


--LEDG[0] is LEDG[0]
--operation mode is output

LEDG[0] = OUTPUT(GND);


--LEDG[1] is LEDG[1]
--operation mode is output

LEDG[1] = OUTPUT(GND);


--LEDG[2] is LEDG[2]
--operation mode is output

LEDG[2] = OUTPUT(GND);


--LEDG[3] is LEDG[3]
--operation mode is output

LEDG[3] = OUTPUT(GND);


--LEDG[4] is LEDG[4]
--operation mode is output

LEDG[4] = OUTPUT(TCH_DOUT);


--LEDG[5] is LEDG[5]
--operation mode is output

LEDG[5] = OUTPUT(TCH_BUSY);


--LEDG[6] is LEDG[6]
--operation mode is output

LEDG[6] = OUTPUT(TCH_PENIRQ);


--LEDG[7] is LEDG[7]
--operation mode is output

LEDG[7] = OUTPUT(GND);


--LEDG[8] is LEDG[8]
--operation mode is output

LEDG[8] = OUTPUT(GND);


--LEDR[0] is LEDR[0]
--operation mode is output

LEDR[0] = OUTPUT(GND);


--LEDR[1] is LEDR[1]
--operation mode is output

LEDR[1] = OUTPUT(GND);


--LEDR[2] is LEDR[2]
--operation mode is output

LEDR[2] = OUTPUT(GND);


--LEDR[3] is LEDR[3]
--operation mode is output

LEDR[3] = OUTPUT(GND);


--LEDR[4] is LEDR[4]
--operation mode is output

LEDR[4] = OUTPUT(GND);


--LEDR[5] is LEDR[5]
--operation mode is output

LEDR[5] = OUTPUT(GND);


--LEDR[6] is LEDR[6]
--operation mode is output

LEDR[6] = OUTPUT(GND);


--LEDR[7] is LEDR[7]
--operation mode is output

LEDR[7] = OUTPUT(GND);


--LEDR[8] is LEDR[8]
--operation mode is output

LEDR[8] = OUTPUT(GND);


--LEDR[9] is LEDR[9]
--operation mode is output

LEDR[9] = OUTPUT(GND);


--LEDR[10] is LEDR[10]
--operation mode is output

LEDR[10] = OUTPUT(GND);


--LEDR[11] is LEDR[11]
--operation mode is output

LEDR[11] = OUTPUT(GND);


--LEDR[12] is LEDR[12]
--operation mode is output

LEDR[12] = OUTPUT(GND);


--LEDR[13] is LEDR[13]
--operation mode is output

LEDR[13] = OUTPUT(GND);


--LEDR[14] is LEDR[14]
--operation mode is output

LEDR[14] = OUTPUT(GND);


--LEDR[15] is LEDR[15]
--operation mode is output

LEDR[15] = OUTPUT(GND);


--LEDR[16] is LEDR[16]
--operation mode is output

LEDR[16] = OUTPUT(GND);


--LEDR[17] is LEDR[17]
--operation mode is output

LEDR[17] = OUTPUT(GND);


--UART_TXD is UART_TXD
--operation mode is output

UART_TXD = OUTPUT(GND);


--IRDA_TXD is IRDA_TXD
--operation mode is output

IRDA_TXD = OUTPUT(GND);


--DRAM_ADDR[0] is DRAM_ADDR[0]
--operation mode is output

DRAM_ADDR[0] = OUTPUT(GND);


--DRAM_ADDR[1] is DRAM_ADDR[1]
--operation mode is output

DRAM_ADDR[1] = OUTPUT(GND);


--DRAM_ADDR[2] is DRAM_ADDR[2]
--operation mode is output

DRAM_ADDR[2] = OUTPUT(GND);


--DRAM_ADDR[3] is DRAM_ADDR[3]
--operation mode is output

DRAM_ADDR[3] = OUTPUT(GND);


--DRAM_ADDR[4] is DRAM_ADDR[4]
--operation mode is output

DRAM_ADDR[4] = OUTPUT(GND);


--DRAM_ADDR[5] is DRAM_ADDR[5]
--operation mode is output

DRAM_ADDR[5] = OUTPUT(GND);


--DRAM_ADDR[6] is DRAM_ADDR[6]
--operation mode is output

DRAM_ADDR[6] = OUTPUT(GND);


--DRAM_ADDR[7] is DRAM_ADDR[7]
--operation mode is output

DRAM_ADDR[7] = OUTPUT(GND);


--DRAM_ADDR[8] is DRAM_ADDR[8]
--operation mode is output

DRAM_ADDR[8] = OUTPUT(GND);


--DRAM_ADDR[9] is DRAM_ADDR[9]
--operation mode is output

DRAM_ADDR[9] = OUTPUT(GND);


--DRAM_ADDR[10] is DRAM_ADDR[10]
--operation mode is output

DRAM_ADDR[10] = OUTPUT(GND);


--DRAM_ADDR[11] is DRAM_ADDR[11]
--operation mode is output

DRAM_ADDR[11] = OUTPUT(GND);


--DRAM_LDQM is DRAM_LDQM
--operation mode is output

DRAM_LDQM = OUTPUT(GND);


--DRAM_UDQM is DRAM_UDQM
--operation mode is output

DRAM_UDQM = OUTPUT(GND);


--DRAM_WE_N is DRAM_WE_N
--operation mode is output

DRAM_WE_N = OUTPUT(GND);


--DRAM_CAS_N is DRAM_CAS_N
--operation mode is output

DRAM_CAS_N = OUTPUT(GND);


--DRAM_RAS_N is DRAM_RAS_N
--operation mode is output

DRAM_RAS_N = OUTPUT(GND);


--DRAM_CS_N is DRAM_CS_N
--operation mode is output

DRAM_CS_N = OUTPUT(GND);


--DRAM_BA_0 is DRAM_BA_0
--operation mode is output

DRAM_BA_0 = OUTPUT(GND);


--DRAM_BA_1 is DRAM_BA_1
--operation mode is output

DRAM_BA_1 = OUTPUT(GND);


--DRAM_CLK is DRAM_CLK
--operation mode is output

DRAM_CLK = OUTPUT(GND);


--DRAM_CKE is DRAM_CKE
--operation mode is output

DRAM_CKE = OUTPUT(GND);


--FL_ADDR[0] is FL_ADDR[0]
--operation mode is output

FL_ADDR[0] = OUTPUT(GND);


--FL_ADDR[1] is FL_ADDR[1]
--operation mode is output

FL_ADDR[1] = OUTPUT(GND);


--FL_ADDR[2] is FL_ADDR[2]
--operation mode is output

FL_ADDR[2] = OUTPUT(GND);


--FL_ADDR[3] is FL_ADDR[3]
--operation mode is output

FL_ADDR[3] = OUTPUT(GND);


--FL_ADDR[4] is FL_ADDR[4]
--operation mode is output

FL_ADDR[4] = OUTPUT(GND);


--FL_ADDR[5] is FL_ADDR[5]
--operation mode is output

FL_ADDR[5] = OUTPUT(GND);


--FL_ADDR[6] is FL_ADDR[6]
--operation mode is output

FL_ADDR[6] = OUTPUT(GND);


--FL_ADDR[7] is FL_ADDR[7]
--operation mode is output

FL_ADDR[7] = OUTPUT(GND);


--FL_ADDR[8] is FL_ADDR[8]
--operation mode is output

FL_ADDR[8] = OUTPUT(GND);


--FL_ADDR[9] is FL_ADDR[9]
--operation mode is output

FL_ADDR[9] = OUTPUT(GND);


--FL_ADDR[10] is FL_ADDR[10]
--operation mode is output

FL_ADDR[10] = OUTPUT(GND);


--FL_ADDR[11] is FL_ADDR[11]
--operation mode is output

FL_ADDR[11] = OUTPUT(GND);


--FL_ADDR[12] is FL_ADDR[12]
--operation mode is output

FL_ADDR[12] = OUTPUT(GND);


--FL_ADDR[13] is FL_ADDR[13]
--operation mode is output

FL_ADDR[13] = OUTPUT(GND);


--FL_ADDR[14] is FL_ADDR[14]
--operation mode is output

FL_ADDR[14] = OUTPUT(GND);


--FL_ADDR[15] is FL_ADDR[15]
--operation mode is output

FL_ADDR[15] = OUTPUT(GND);


--FL_ADDR[16] is FL_ADDR[16]
--operation mode is output

FL_ADDR[16] = OUTPUT(GND);


--FL_ADDR[17] is FL_ADDR[17]
--operation mode is output

FL_ADDR[17] = OUTPUT(GND);


--FL_ADDR[18] is FL_ADDR[18]
--operation mode is output

FL_ADDR[18] = OUTPUT(GND);


--FL_ADDR[19] is FL_ADDR[19]
--operation mode is output

FL_ADDR[19] = OUTPUT(GND);


--FL_ADDR[20] is FL_ADDR[20]
--operation mode is output

FL_ADDR[20] = OUTPUT(GND);


--FL_ADDR[21] is FL_ADDR[21]
--operation mode is output

FL_ADDR[21] = OUTPUT(GND);


--FL_WE_N is FL_WE_N
--operation mode is output

FL_WE_N = OUTPUT(GND);


--FL_RST_N is FL_RST_N
--operation mode is output

FL_RST_N = OUTPUT(GND);


--FL_OE_N is FL_OE_N
--operation mode is output

FL_OE_N = OUTPUT(GND);


--FL_CE_N is FL_CE_N
--operation mode is output

FL_CE_N = OUTPUT(GND);


--SRAM_ADDR[0] is SRAM_ADDR[0]
--operation mode is output

SRAM_ADDR[0] = OUTPUT(GND);


--SRAM_ADDR[1] is SRAM_ADDR[1]
--operation mode is output

SRAM_ADDR[1] = OUTPUT(GND);


--SRAM_ADDR[2] is SRAM_ADDR[2]
--operation mode is output

SRAM_ADDR[2] = OUTPUT(GND);


--SRAM_ADDR[3] is SRAM_ADDR[3]
--operation mode is output

SRAM_ADDR[3] = OUTPUT(GND);


--SRAM_ADDR[4] is SRAM_ADDR[4]
--operation mode is output

SRAM_ADDR[4] = OUTPUT(GND);


--SRAM_ADDR[5] is SRAM_ADDR[5]
--operation mode is output

SRAM_ADDR[5] = OUTPUT(GND);


--SRAM_ADDR[6] is SRAM_ADDR[6]
--operation mode is output

SRAM_ADDR[6] = OUTPUT(GND);


--SRAM_ADDR[7] is SRAM_ADDR[7]
--operation mode is output

SRAM_ADDR[7] = OUTPUT(GND);


--SRAM_ADDR[8] is SRAM_ADDR[8]
--operation mode is output

SRAM_ADDR[8] = OUTPUT(GND);


--SRAM_ADDR[9] is SRAM_ADDR[9]
--operation mode is output

SRAM_ADDR[9] = OUTPUT(GND);


--SRAM_ADDR[10] is SRAM_ADDR[10]
--operation mode is output

SRAM_ADDR[10] = OUTPUT(GND);


--SRAM_ADDR[11] is SRAM_ADDR[11]
--operation mode is output

SRAM_ADDR[11] = OUTPUT(GND);


--SRAM_ADDR[12] is SRAM_ADDR[12]
--operation mode is output

SRAM_ADDR[12] = OUTPUT(GND);


--SRAM_ADDR[13] is SRAM_ADDR[13]
--operation mode is output

SRAM_ADDR[13] = OUTPUT(GND);


--SRAM_ADDR[14] is SRAM_ADDR[14]
--operation mode is output

SRAM_ADDR[14] = OUTPUT(GND);


--SRAM_ADDR[15] is SRAM_ADDR[15]
--operation mode is output

SRAM_ADDR[15] = OUTPUT(GND);


--SRAM_ADDR[16] is SRAM_ADDR[16]
--operation mode is output

SRAM_ADDR[16] = OUTPUT(GND);


--SRAM_ADDR[17] is SRAM_ADDR[17]
--operation mode is output

SRAM_ADDR[17] = OUTPUT(GND);


--SRAM_UB_N is SRAM_UB_N
--operation mode is output

SRAM_UB_N = OUTPUT(GND);


--SRAM_LB_N is SRAM_LB_N
--operation mode is output

SRAM_LB_N = OUTPUT(GND);


--SRAM_WE_N is SRAM_WE_N
--operation mode is output

SRAM_WE_N = OUTPUT(GND);


--SRAM_CE_N is SRAM_CE_N
--operation mode is output

SRAM_CE_N = OUTPUT(GND);


--SRAM_OE_N is SRAM_OE_N
--operation mode is output

SRAM_OE_N = OUTPUT(GND);


--OTG_ADDR[0] is OTG_ADDR[0]
--operation mode is output

OTG_ADDR[0] = OUTPUT(GND);


--OTG_ADDR[1] is OTG_ADDR[1]
--operation mode is output

OTG_ADDR[1] = OUTPUT(GND);


--OTG_CS_N is OTG_CS_N
--operation mode is output

OTG_CS_N = OUTPUT(GND);


--OTG_RD_N is OTG_RD_N
--operation mode is output

OTG_RD_N = OUTPUT(GND);


--OTG_WR_N is OTG_WR_N
--operation mode is output

OTG_WR_N = OUTPUT(GND);


--OTG_RST_N is OTG_RST_N
--operation mode is output

OTG_RST_N = OUTPUT(GND);


--OTG_FSPEED is OTG_FSPEED
--operation mode is output

OTG_FSPEED = OUTPUT(GND);


--OTG_LSPEED is OTG_LSPEED
--operation mode is output

OTG_LSPEED = OUTPUT(GND);


--OTG_DACK0_N is OTG_DACK0_N
--operation mode is output

OTG_DACK0_N = OUTPUT(GND);


--OTG_DACK1_N is OTG_DACK1_N
--operation mode is output

OTG_DACK1_N = OUTPUT(GND);


--LCD_ON is LCD_ON
--operation mode is output

LCD_ON = OUTPUT(GND);


--LCD_BLON is LCD_BLON
--operation mode is output

LCD_BLON = OUTPUT(GND);


--LCD_RW is LCD_RW
--operation mode is output

LCD_RW = OUTPUT(GND);


--LCD_EN is LCD_EN
--operation mode is output

LCD_EN = OUTPUT(GND);


--LCD_RS is LCD_RS
--operation mode is output

LCD_RS = OUTPUT(GND);


--SD_CLK is SD_CLK
--operation mode is output

SD_CLK = OUTPUT(GND);


--TDO is TDO
--operation mode is output

TDO = OUTPUT(GND);


--I2C_SCLK is I2C_SCLK
--operation mode is output

I2C_SCLK = OUTPUT(UB1L17);


--VGA_CLK is VGA_CLK
--operation mode is output

VGA_CLK = OUTPUT(GND);


--VGA_HS is VGA_HS
--operation mode is output

VGA_HS = OUTPUT(GND);


--VGA_VS is VGA_VS
--operation mode is output

VGA_VS = OUTPUT(GND);


--VGA_BLANK is VGA_BLANK
--operation mode is output

VGA_BLANK = OUTPUT(GND);


--VGA_SYNC is VGA_SYNC
--operation mode is output

VGA_SYNC = OUTPUT(GND);


--VGA_R[0] is VGA_R[0]
--operation mode is output

VGA_R[0] = OUTPUT(GND);


--VGA_R[1] is VGA_R[1]
--operation mode is output

VGA_R[1] = OUTPUT(GND);


--VGA_R[2] is VGA_R[2]
--operation mode is output

VGA_R[2] = OUTPUT(GND);


--VGA_R[3] is VGA_R[3]
--operation mode is output

VGA_R[3] = OUTPUT(GND);


--VGA_R[4] is VGA_R[4]
--operation mode is output

VGA_R[4] = OUTPUT(GND);


--VGA_R[5] is VGA_R[5]
--operation mode is output

VGA_R[5] = OUTPUT(GND);


--VGA_R[6] is VGA_R[6]
--operation mode is output

VGA_R[6] = OUTPUT(GND);


--VGA_R[7] is VGA_R[7]
--operation mode is output

VGA_R[7] = OUTPUT(GND);


--VGA_R[8] is VGA_R[8]
--operation mode is output

VGA_R[8] = OUTPUT(GND);


--VGA_R[9] is VGA_R[9]
--operation mode is output

VGA_R[9] = OUTPUT(GND);


--VGA_G[0] is VGA_G[0]
--operation mode is output

VGA_G[0] = OUTPUT(GND);


--VGA_G[1] is VGA_G[1]
--operation mode is output

VGA_G[1] = OUTPUT(GND);


--VGA_G[2] is VGA_G[2]
--operation mode is output

VGA_G[2] = OUTPUT(GND);


--VGA_G[3] is VGA_G[3]
--operation mode is output

VGA_G[3] = OUTPUT(GND);


--VGA_G[4] is VGA_G[4]
--operation mode is output

VGA_G[4] = OUTPUT(GND);


--VGA_G[5] is VGA_G[5]
--operation mode is output

VGA_G[5] = OUTPUT(GND);


--VGA_G[6] is VGA_G[6]
--operation mode is output

VGA_G[6] = OUTPUT(GND);


--VGA_G[7] is VGA_G[7]
--operation mode is output

VGA_G[7] = OUTPUT(GND);


--VGA_G[8] is VGA_G[8]
--operation mode is output

VGA_G[8] = OUTPUT(GND);


--VGA_G[9] is VGA_G[9]
--operation mode is output

VGA_G[9] = OUTPUT(GND);


--VGA_B[0] is VGA_B[0]
--operation mode is output

VGA_B[0] = OUTPUT(GND);


--VGA_B[1] is VGA_B[1]
--operation mode is output

VGA_B[1] = OUTPUT(GND);


--VGA_B[2] is VGA_B[2]
--operation mode is output

VGA_B[2] = OUTPUT(GND);


--VGA_B[3] is VGA_B[3]
--operation mode is output

VGA_B[3] = OUTPUT(GND);


--VGA_B[4] is VGA_B[4]
--operation mode is output

VGA_B[4] = OUTPUT(GND);


--VGA_B[5] is VGA_B[5]
--operation mode is output

VGA_B[5] = OUTPUT(GND);


--VGA_B[6] is VGA_B[6]
--operation mode is output

VGA_B[6] = OUTPUT(GND);


--VGA_B[7] is VGA_B[7]
--operation mode is output

VGA_B[7] = OUTPUT(GND);


--VGA_B[8] is VGA_B[8]
--operation mode is output

VGA_B[8] = OUTPUT(GND);


--VGA_B[9] is VGA_B[9]
--operation mode is output

VGA_B[9] = OUTPUT(GND);


--ENET_CMD is ENET_CMD
--operation mode is output

ENET_CMD = OUTPUT(GND);


--ENET_CS_N is ENET_CS_N
--operation mode is output

ENET_CS_N = OUTPUT(GND);


--ENET_WR_N is ENET_WR_N
--operation mode is output

ENET_WR_N = OUTPUT(GND);


--ENET_RD_N is ENET_RD_N
--operation mode is output

ENET_RD_N = OUTPUT(GND);


--ENET_RST_N is ENET_RST_N
--operation mode is output

ENET_RST_N = OUTPUT(GND);


--ENET_CLK is ENET_CLK
--operation mode is output

ENET_CLK = OUTPUT(GND);


--AUD_DACDAT is AUD_DACDAT
--operation mode is output

AUD_DACDAT = OUTPUT(GND);


--AUD_XCK is AUD_XCK
--operation mode is output

AUD_XCK = OUTPUT(GND);


--TD_RESET is TD_RESET
--operation mode is output

TD_RESET = OUTPUT(KEY[0]);


--x_coord[0] is x_coord[0]
--operation mode is output

x_coord[0] = OUTPUT(K1_oX_COORD[0]);


--x_coord[1] is x_coord[1]
--operation mode is output

x_coord[1] = OUTPUT(K1_oX_COORD[1]);


--x_coord[2] is x_coord[2]
--operation mode is output

x_coord[2] = OUTPUT(K1_oX_COORD[2]);


--x_coord[3] is x_coord[3]
--operation mode is output

x_coord[3] = OUTPUT(K1_oX_COORD[3]);


--x_coord[4] is x_coord[4]
--operation mode is output

x_coord[4] = OUTPUT(K1_oX_COORD[4]);


--x_coord[5] is x_coord[5]
--operation mode is output

x_coord[5] = OUTPUT(K1_oX_COORD[5]);


--x_coord[6] is x_coord[6]
--operation mode is output

x_coord[6] = OUTPUT(K1_oX_COORD[6]);


--x_coord[7] is x_coord[7]
--operation mode is output

x_coord[7] = OUTPUT(K1_oX_COORD[7]);


--x_coord[8] is x_coord[8]
--operation mode is output

x_coord[8] = OUTPUT(K1_oX_COORD[8]);


--x_coord[9] is x_coord[9]
--operation mode is output

x_coord[9] = OUTPUT(K1_oX_COORD[9]);


--x_coord[10] is x_coord[10]
--operation mode is output

x_coord[10] = OUTPUT(K1_oX_COORD[10]);


--x_coord[11] is x_coord[11]
--operation mode is output

x_coord[11] = OUTPUT(K1_oX_COORD[11]);


--y_coord[0] is y_coord[0]
--operation mode is output

y_coord[0] = OUTPUT(K1_oY_COORD[0]);


--y_coord[1] is y_coord[1]
--operation mode is output

y_coord[1] = OUTPUT(K1_oY_COORD[1]);


--y_coord[2] is y_coord[2]
--operation mode is output

y_coord[2] = OUTPUT(K1_oY_COORD[2]);


--y_coord[3] is y_coord[3]
--operation mode is output

y_coord[3] = OUTPUT(K1_oY_COORD[3]);


--y_coord[4] is y_coord[4]
--operation mode is output

y_coord[4] = OUTPUT(K1_oY_COORD[4]);


--y_coord[5] is y_coord[5]
--operation mode is output

y_coord[5] = OUTPUT(K1_oY_COORD[5]);


--y_coord[6] is y_coord[6]
--operation mode is output

y_coord[6] = OUTPUT(K1_oY_COORD[6]);


--y_coord[7] is y_coord[7]
--operation mode is output

y_coord[7] = OUTPUT(K1_oY_COORD[7]);


--y_coord[8] is y_coord[8]
--operation mode is output

y_coord[8] = OUTPUT(K1_oY_COORD[8]);


--y_coord[9] is y_coord[9]
--operation mode is output

y_coord[9] = OUTPUT(K1_oY_COORD[9]);


--y_coord[10] is y_coord[10]
--operation mode is output

y_coord[10] = OUTPUT(K1_oY_COORD[10]);


--y_coord[11] is y_coord[11]
--operation mode is output

y_coord[11] = OUTPUT(K1_oY_COORD[11]);



--FL_DQ[0] is FL_DQ[0]
--operation mode is bidir

FL_DQ[0] = BIDIR(OPNDRN(VCC));


--FL_DQ[1] is FL_DQ[1]
--operation mode is bidir

FL_DQ[1] = BIDIR(OPNDRN(VCC));


--FL_DQ[2] is FL_DQ[2]
--operation mode is bidir

FL_DQ[2] = BIDIR(OPNDRN(VCC));


--FL_DQ[3] is FL_DQ[3]
--operation mode is bidir

FL_DQ[3] = BIDIR(OPNDRN(VCC));


--FL_DQ[4] is FL_DQ[4]
--operation mode is bidir

FL_DQ[4] = BIDIR(OPNDRN(VCC));


--FL_DQ[5] is FL_DQ[5]
--operation mode is bidir

FL_DQ[5] = BIDIR(OPNDRN(VCC));


--FL_DQ[6] is FL_DQ[6]
--operation mode is bidir

FL_DQ[6] = BIDIR(OPNDRN(VCC));


--FL_DQ[7] is FL_DQ[7]
--operation mode is bidir

FL_DQ[7] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[0] is SRAM_DQ[0]
--operation mode is bidir

SRAM_DQ[0] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[1] is SRAM_DQ[1]
--operation mode is bidir

SRAM_DQ[1] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[2] is SRAM_DQ[2]
--operation mode is bidir

SRAM_DQ[2] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[3] is SRAM_DQ[3]
--operation mode is bidir

SRAM_DQ[3] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[4] is SRAM_DQ[4]
--operation mode is bidir

SRAM_DQ[4] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[5] is SRAM_DQ[5]
--operation mode is bidir

SRAM_DQ[5] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[6] is SRAM_DQ[6]
--operation mode is bidir

SRAM_DQ[6] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[7] is SRAM_DQ[7]
--operation mode is bidir

SRAM_DQ[7] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[8] is SRAM_DQ[8]
--operation mode is bidir

SRAM_DQ[8] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[9] is SRAM_DQ[9]
--operation mode is bidir

SRAM_DQ[9] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[10] is SRAM_DQ[10]
--operation mode is bidir

SRAM_DQ[10] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[11] is SRAM_DQ[11]
--operation mode is bidir

SRAM_DQ[11] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[12] is SRAM_DQ[12]
--operation mode is bidir

SRAM_DQ[12] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[13] is SRAM_DQ[13]
--operation mode is bidir

SRAM_DQ[13] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[14] is SRAM_DQ[14]
--operation mode is bidir

SRAM_DQ[14] = BIDIR(OPNDRN(VCC));


--SRAM_DQ[15] is SRAM_DQ[15]
--operation mode is bidir

SRAM_DQ[15] = BIDIR(OPNDRN(VCC));


--SD_DAT3 is SD_DAT3
--operation mode is bidir

SD_DAT3 = BIDIR(OPNDRN(VCC));


--SD_CMD is SD_CMD
--operation mode is bidir

SD_CMD = BIDIR(OPNDRN(VCC));


--GPIO_1[0] is GPIO_1[0]
--operation mode is bidir

GPIO_1[0] = BIDIR(OPNDRN(VCC));


--GPIO_1[1] is GPIO_1[1]
--operation mode is bidir

GPIO_1[1] = BIDIR(OPNDRN(VCC));


--GPIO_1[2] is GPIO_1[2]
--operation mode is bidir

GPIO_1[2] = BIDIR(OPNDRN(VCC));


--GPIO_1[3] is GPIO_1[3]
--operation mode is bidir

GPIO_1[3] = BIDIR(OPNDRN(VCC));


--GPIO_1[4] is GPIO_1[4]
--operation mode is bidir

GPIO_1[4] = BIDIR(OPNDRN(VCC));


--GPIO_1[5] is GPIO_1[5]
--operation mode is bidir

GPIO_1[5] = BIDIR(OPNDRN(VCC));


--GPIO_1[6] is GPIO_1[6]
--operation mode is bidir

GPIO_1[6] = BIDIR(OPNDRN(VCC));


--GPIO_1[7] is GPIO_1[7]
--operation mode is bidir

GPIO_1[7] = BIDIR(OPNDRN(VCC));


--GPIO_1[8] is GPIO_1[8]
--operation mode is bidir

GPIO_1[8] = BIDIR(OPNDRN(VCC));


--GPIO_1[9] is GPIO_1[9]
--operation mode is bidir

GPIO_1[9] = BIDIR(OPNDRN(VCC));


--GPIO_1[10] is GPIO_1[10]
--operation mode is bidir

GPIO_1[10] = BIDIR(OPNDRN(VCC));


--GPIO_1[11] is GPIO_1[11]
--operation mode is bidir

GPIO_1[11] = BIDIR(OPNDRN(VCC));


--GPIO_1[12] is GPIO_1[12]
--operation mode is bidir

GPIO_1[12] = BIDIR(OPNDRN(VCC));


--GPIO_1[13] is GPIO_1[13]
--operation mode is bidir

GPIO_1[13] = BIDIR(OPNDRN(VCC));


--GPIO_1[14] is GPIO_1[14]
--operation mode is bidir

GPIO_1[14] = BIDIR(OPNDRN(VCC));


--GPIO_1[15] is GPIO_1[15]
--operation mode is bidir

GPIO_1[15] = BIDIR(OPNDRN(VCC));


--GPIO_1[16] is GPIO_1[16]
--operation mode is bidir

GPIO_1[16] = BIDIR(OPNDRN(VCC));


--GPIO_1[17] is GPIO_1[17]
--operation mode is bidir

GPIO_1[17] = BIDIR(OPNDRN(VCC));


--GPIO_1[18] is GPIO_1[18]
--operation mode is bidir

GPIO_1[18] = BIDIR(OPNDRN(VCC));


--GPIO_1[19] is GPIO_1[19]
--operation mode is bidir

GPIO_1[19] = BIDIR(OPNDRN(VCC));


--GPIO_1[20] is GPIO_1[20]
--operation mode is bidir

GPIO_1[20] = BIDIR(OPNDRN(VCC));


--GPIO_1[21] is GPIO_1[21]
--operation mode is bidir

GPIO_1[21] = BIDIR(OPNDRN(VCC));


--GPIO_1[22] is GPIO_1[22]
--operation mode is bidir

GPIO_1[22] = BIDIR(OPNDRN(VCC));


--GPIO_1[23] is GPIO_1[23]
--operation mode is bidir

GPIO_1[23] = BIDIR(OPNDRN(VCC));


--GPIO_1[24] is GPIO_1[24]
--operation mode is bidir

GPIO_1[24] = BIDIR(OPNDRN(VCC));


--GPIO_1[25] is GPIO_1[25]
--operation mode is bidir

GPIO_1[25] = BIDIR(OPNDRN(VCC));


--GPIO_1[26] is GPIO_1[26]
--operation mode is bidir

GPIO_1[26] = BIDIR(OPNDRN(VCC));


--GPIO_1[27] is GPIO_1[27]
--operation mode is bidir

GPIO_1[27] = BIDIR(OPNDRN(VCC));


--GPIO_1[28] is GPIO_1[28]
--operation mode is bidir

GPIO_1[28] = BIDIR(OPNDRN(VCC));


--GPIO_1[29] is GPIO_1[29]
--operation mode is bidir

GPIO_1[29] = BIDIR(OPNDRN(VCC));


--GPIO_1[30] is GPIO_1[30]
--operation mode is bidir

GPIO_1[30] = BIDIR(OPNDRN(VCC));


--GPIO_1[31] is GPIO_1[31]
--operation mode is bidir

GPIO_1[31] = BIDIR(OPNDRN(VCC));


--GPIO_1[32] is GPIO_1[32]
--operation mode is bidir

GPIO_1[32] = BIDIR(OPNDRN(VCC));


--GPIO_1[33] is GPIO_1[33]
--operation mode is bidir

GPIO_1[33] = BIDIR(OPNDRN(VCC));


--GPIO_1[34] is GPIO_1[34]
--operation mode is bidir

GPIO_1[34] = BIDIR(OPNDRN(VCC));


--GPIO_1[35] is GPIO_1[35]
--operation mode is bidir

GPIO_1[35] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[0] is DRAM_DQ[0]
--operation mode is bidir

DRAM_DQ[0] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[1] is DRAM_DQ[1]
--operation mode is bidir

DRAM_DQ[1] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[2] is DRAM_DQ[2]
--operation mode is bidir

DRAM_DQ[2] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[3] is DRAM_DQ[3]
--operation mode is bidir

DRAM_DQ[3] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[4] is DRAM_DQ[4]
--operation mode is bidir

DRAM_DQ[4] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[5] is DRAM_DQ[5]
--operation mode is bidir

DRAM_DQ[5] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[6] is DRAM_DQ[6]
--operation mode is bidir

DRAM_DQ[6] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[7] is DRAM_DQ[7]
--operation mode is bidir

DRAM_DQ[7] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[8] is DRAM_DQ[8]
--operation mode is bidir

DRAM_DQ[8] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[9] is DRAM_DQ[9]
--operation mode is bidir

DRAM_DQ[9] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[10] is DRAM_DQ[10]
--operation mode is bidir

DRAM_DQ[10] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[11] is DRAM_DQ[11]
--operation mode is bidir

DRAM_DQ[11] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[12] is DRAM_DQ[12]
--operation mode is bidir

DRAM_DQ[12] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[13] is DRAM_DQ[13]
--operation mode is bidir

DRAM_DQ[13] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[14] is DRAM_DQ[14]
--operation mode is bidir

DRAM_DQ[14] = BIDIR(OPNDRN(VCC));


--DRAM_DQ[15] is DRAM_DQ[15]
--operation mode is bidir

DRAM_DQ[15] = BIDIR(OPNDRN(VCC));


--OTG_DATA[0] is OTG_DATA[0]
--operation mode is bidir

OTG_DATA[0] = BIDIR(OPNDRN(VCC));


--OTG_DATA[1] is OTG_DATA[1]
--operation mode is bidir

OTG_DATA[1] = BIDIR(OPNDRN(VCC));


--OTG_DATA[2] is OTG_DATA[2]
--operation mode is bidir

OTG_DATA[2] = BIDIR(OPNDRN(VCC));


--OTG_DATA[3] is OTG_DATA[3]
--operation mode is bidir

OTG_DATA[3] = BIDIR(OPNDRN(VCC));


--OTG_DATA[4] is OTG_DATA[4]
--operation mode is bidir

OTG_DATA[4] = BIDIR(OPNDRN(VCC));


--OTG_DATA[5] is OTG_DATA[5]
--operation mode is bidir

OTG_DATA[5] = BIDIR(OPNDRN(VCC));


--OTG_DATA[6] is OTG_DATA[6]
--operation mode is bidir

OTG_DATA[6] = BIDIR(OPNDRN(VCC));


--OTG_DATA[7] is OTG_DATA[7]
--operation mode is bidir

OTG_DATA[7] = BIDIR(OPNDRN(VCC));


--OTG_DATA[8] is OTG_DATA[8]
--operation mode is bidir

OTG_DATA[8] = BIDIR(OPNDRN(VCC));


--OTG_DATA[9] is OTG_DATA[9]
--operation mode is bidir

OTG_DATA[9] = BIDIR(OPNDRN(VCC));


--OTG_DATA[10] is OTG_DATA[10]
--operation mode is bidir

OTG_DATA[10] = BIDIR(OPNDRN(VCC));


--OTG_DATA[11] is OTG_DATA[11]
--operation mode is bidir

OTG_DATA[11] = BIDIR(OPNDRN(VCC));


--OTG_DATA[12] is OTG_DATA[12]
--operation mode is bidir

OTG_DATA[12] = BIDIR(OPNDRN(VCC));


--OTG_DATA[13] is OTG_DATA[13]
--operation mode is bidir

OTG_DATA[13] = BIDIR(OPNDRN(VCC));


--OTG_DATA[14] is OTG_DATA[14]
--operation mode is bidir

OTG_DATA[14] = BIDIR(OPNDRN(VCC));


--OTG_DATA[15] is OTG_DATA[15]
--operation mode is bidir

OTG_DATA[15] = BIDIR(OPNDRN(VCC));


--LCD_DATA[0] is LCD_DATA[0]
--operation mode is bidir

LCD_DATA[0] = BIDIR(OPNDRN(VCC));


--LCD_DATA[1] is LCD_DATA[1]
--operation mode is bidir

LCD_DATA[1] = BIDIR(OPNDRN(VCC));


--LCD_DATA[2] is LCD_DATA[2]
--operation mode is bidir

LCD_DATA[2] = BIDIR(OPNDRN(VCC));


--LCD_DATA[3] is LCD_DATA[3]
--operation mode is bidir

LCD_DATA[3] = BIDIR(OPNDRN(VCC));


--LCD_DATA[4] is LCD_DATA[4]
--operation mode is bidir

LCD_DATA[4] = BIDIR(OPNDRN(VCC));


--LCD_DATA[5] is LCD_DATA[5]
--operation mode is bidir

LCD_DATA[5] = BIDIR(OPNDRN(VCC));


--LCD_DATA[6] is LCD_DATA[6]
--operation mode is bidir

LCD_DATA[6] = BIDIR(OPNDRN(VCC));


--LCD_DATA[7] is LCD_DATA[7]
--operation mode is bidir

LCD_DATA[7] = BIDIR(OPNDRN(VCC));


--SD_DAT is SD_DAT
--operation mode is bidir

SD_DAT = BIDIR(OPNDRN(VCC));


--A1L251 is I2C_SDAT~0
--operation mode is bidir

A1L251 = I2C_SDAT;

--I2C_SDAT is I2C_SDAT
--operation mode is bidir

I2C_SDAT = BIDIR(OPNDRN(!UB1L25Q));


--ENET_DATA[0] is ENET_DATA[0]
--operation mode is bidir

ENET_DATA[0] = BIDIR(OPNDRN(VCC));


--ENET_DATA[1] is ENET_DATA[1]
--operation mode is bidir

ENET_DATA[1] = BIDIR(OPNDRN(VCC));


--ENET_DATA[2] is ENET_DATA[2]
--operation mode is bidir

ENET_DATA[2] = BIDIR(OPNDRN(VCC));


--ENET_DATA[3] is ENET_DATA[3]
--operation mode is bidir

ENET_DATA[3] = BIDIR(OPNDRN(VCC));


--ENET_DATA[4] is ENET_DATA[4]
--operation mode is bidir

ENET_DATA[4] = BIDIR(OPNDRN(VCC));


--ENET_DATA[5] is ENET_DATA[5]
--operation mode is bidir

ENET_DATA[5] = BIDIR(OPNDRN(VCC));


--ENET_DATA[6] is ENET_DATA[6]
--operation mode is bidir

ENET_DATA[6] = BIDIR(OPNDRN(VCC));


--ENET_DATA[7] is ENET_DATA[7]
--operation mode is bidir

ENET_DATA[7] = BIDIR(OPNDRN(VCC));


--ENET_DATA[8] is ENET_DATA[8]
--operation mode is bidir

ENET_DATA[8] = BIDIR(OPNDRN(VCC));


--ENET_DATA[9] is ENET_DATA[9]
--operation mode is bidir

ENET_DATA[9] = BIDIR(OPNDRN(VCC));


--ENET_DATA[10] is ENET_DATA[10]
--operation mode is bidir

ENET_DATA[10] = BIDIR(OPNDRN(VCC));


--ENET_DATA[11] is ENET_DATA[11]
--operation mode is bidir

ENET_DATA[11] = BIDIR(OPNDRN(VCC));


--ENET_DATA[12] is ENET_DATA[12]
--operation mode is bidir

ENET_DATA[12] = BIDIR(OPNDRN(VCC));


--ENET_DATA[13] is ENET_DATA[13]
--operation mode is bidir

ENET_DATA[13] = BIDIR(OPNDRN(VCC));


--ENET_DATA[14] is ENET_DATA[14]
--operation mode is bidir

ENET_DATA[14] = BIDIR(OPNDRN(VCC));


--ENET_DATA[15] is ENET_DATA[15]
--operation mode is bidir

ENET_DATA[15] = BIDIR(OPNDRN(VCC));


--AUD_ADCLRCK is AUD_ADCLRCK
--operation mode is bidir

AUD_ADCLRCK = BIDIR(OPNDRN(VCC));


--AUD_DACLRCK is AUD_DACLRCK
--operation mode is bidir

AUD_DACLRCK = BIDIR(OPNDRN(VCC));


--AUD_BCLK is AUD_BCLK
--operation mode is bidir

AUD_BCLK = BIDIR(OPNDRN(VCC));


--TCH_PENIRQ is TCH_PENIRQ
--operation mode is bidir

TCH_PENIRQ = GPIO_0[0];

--GPIO_0[0] is GPIO_0[0]
--operation mode is bidir

GPIO_0[0] = BIDIR(OPNDRN(VCC));


--TCH_DOUT is TCH_DOUT
--operation mode is bidir

TCH_DOUT = GPIO_0[1];

--GPIO_0[1] is GPIO_0[1]
--operation mode is bidir

GPIO_0[1] = BIDIR(OPNDRN(VCC));


--TCH_BUSY is TCH_BUSY
--operation mode is bidir

TCH_BUSY = GPIO_0[2];

--GPIO_0[2] is GPIO_0[2]
--operation mode is bidir

GPIO_0[2] = BIDIR(OPNDRN(VCC));


--GPIO_0[3] is GPIO_0[3]
--operation mode is bidir

GPIO_0[3]_tri_out = TRI(K1_oADC_DIN, VCC);
GPIO_0[3] = BIDIR(GPIO_0[3]_tri_out);


--GPIO_0[4] is GPIO_0[4]
--operation mode is bidir

GPIO_0[4]_tri_out = TRI(A1L1, VCC);
GPIO_0[4] = BIDIR(GPIO_0[4]_tri_out);


--GPIO_0[5] is GPIO_0[5]
--operation mode is bidir

GPIO_0[5]_tri_out = TRI(H1L8, VCC);
GPIO_0[5] = BIDIR(GPIO_0[5]_tri_out);


--GPIO_0[6] is GPIO_0[6]
--operation mode is bidir

GPIO_0[6]_tri_out = TRI(H1L8, VCC);
GPIO_0[6] = BIDIR(GPIO_0[6]_tri_out);


--GPIO_0[7] is GPIO_0[7]
--operation mode is bidir

GPIO_0[7]_tri_out = TRI(H1L8, VCC);
GPIO_0[7] = BIDIR(GPIO_0[7]_tri_out);


--GPIO_0[8] is GPIO_0[8]
--operation mode is bidir

GPIO_0[8]_tri_out = TRI(H1L8, VCC);
GPIO_0[8] = BIDIR(GPIO_0[8]_tri_out);


--GPIO_0[9] is GPIO_0[9]
--operation mode is bidir

GPIO_0[9]_tri_out = TRI(!CLOCK_27, VCC);
GPIO_0[9] = BIDIR(GPIO_0[9]_tri_out);


--GPIO_0[10] is GPIO_0[10]
--operation mode is bidir

GPIO_0[10]_tri_out = TRI(H1_DENB, VCC);
GPIO_0[10] = BIDIR(GPIO_0[10]_tri_out);


--GPIO_0[11] is GPIO_0[11]
--operation mode is bidir

GPIO_0[11]_tri_out = TRI(!H1_Hsyn, VCC);
GPIO_0[11] = BIDIR(GPIO_0[11]_tri_out);


--GPIO_0[12] is GPIO_0[12]
--operation mode is bidir

GPIO_0[12]_tri_out = TRI(!H1_Vsyn, VCC);
GPIO_0[12] = BIDIR(GPIO_0[12]_tri_out);


--GPIO_0[13] is GPIO_0[13]
--operation mode is bidir

GPIO_0[13]_tri_out = TRI(H1L8, VCC);
GPIO_0[13] = BIDIR(GPIO_0[13]_tri_out);


--GPIO_0[14] is GPIO_0[14]
--operation mode is bidir

GPIO_0[14]_tri_out = TRI(H1L8, VCC);
GPIO_0[14] = BIDIR(GPIO_0[14]_tri_out);


--GPIO_0[15] is GPIO_0[15]
--operation mode is bidir

GPIO_0[15]_tri_out = TRI(H1L8, VCC);
GPIO_0[15] = BIDIR(GPIO_0[15]_tri_out);


--GPIO_0[16] is GPIO_0[16]
--operation mode is bidir

GPIO_0[16]_tri_out = TRI(H1L8, VCC);
GPIO_0[16] = BIDIR(GPIO_0[16]_tri_out);


--GPIO_0[17] is GPIO_0[17]
--operation mode is bidir

GPIO_0[17] = BIDIR(OPNDRN(GND));


--GPIO_0[18] is GPIO_0[18]
--operation mode is bidir

GPIO_0[18] = BIDIR(OPNDRN(GND));


--GPIO_0[19] is GPIO_0[19]
--operation mode is bidir

GPIO_0[19] = BIDIR(OPNDRN(GND));


--GPIO_0[20] is GPIO_0[20]
--operation mode is bidir

GPIO_0[20] = BIDIR(OPNDRN(GND));


--GPIO_0[21] is GPIO_0[21]
--operation mode is bidir

GPIO_0[21] = BIDIR(OPNDRN(GND));


--GPIO_0[22] is GPIO_0[22]
--operation mode is bidir

GPIO_0[22] = BIDIR(OPNDRN(GND));


--GPIO_0[23] is GPIO_0[23]
--operation mode is bidir

GPIO_0[23] = BIDIR(OPNDRN(GND));


--GPIO_0[24] is GPIO_0[24]
--operation mode is bidir

GPIO_0[24] = BIDIR(OPNDRN(GND));


--GPIO_0[25] is GPIO_0[25]
--operation mode is bidir

GPIO_0[25] = BIDIR(OPNDRN(GND));


--GPIO_0[26] is GPIO_0[26]
--operation mode is bidir

GPIO_0[26] = BIDIR(OPNDRN(GND));


--GPIO_0[27] is GPIO_0[27]
--operation mode is bidir

GPIO_0[27] = BIDIR(OPNDRN(GND));


--GPIO_0[28] is GPIO_0[28]
--operation mode is bidir

GPIO_0[28] = BIDIR(OPNDRN(GND));


--GPIO_0[29] is GPIO_0[29]
--operation mode is bidir

GPIO_0[29] = BIDIR(OPNDRN(GND));


--GPIO_0[30] is GPIO_0[30]
--operation mode is bidir

GPIO_0[30] = BIDIR(OPNDRN(GND));


--GPIO_0[31] is GPIO_0[31]
--operation mode is bidir

GPIO_0[31] = BIDIR(OPNDRN(GND));


--GPIO_0[32] is GPIO_0[32]
--operation mode is bidir

GPIO_0[32] = BIDIR(OPNDRN(GND));


--GPIO_0[33] is GPIO_0[33]
--operation mode is bidir

GPIO_0[33]_tri_out = TRI(KEY[2], VCC);
GPIO_0[33] = BIDIR(GPIO_0[33]_tri_out);


--GPIO_0[34] is GPIO_0[34]
--operation mode is bidir

GPIO_0[34]_tri_out = TRI(VCC, VCC);
GPIO_0[34] = BIDIR(GPIO_0[34]_tri_out);


--LCM_SDA is LCM_SDA
--operation mode is bidir

LCM_SDA = GPIO_0[35];

--GPIO_0[35] is GPIO_0[35]
--operation mode is bidir

GPIO_0[35]_tri_out = TRI(TB1_mSDATA, TB1L78);
GPIO_0[35] = BIDIR(GPIO_0[35]_tri_out);


--C1L22 is sld_hub:sld_hub_inst|hub_tdo~767
C1L22 = AMPP_FUNCTION(C1_hub_tdo);


